公开(公告)号：US20180004522A1

公开(公告)日：2018-01-04

申请号：US15201218

申请日：2016-07-01

Applicant: Intel Corporation

Inventor： VIKASH AGARWAL ,  CHRISTOPHER D. BRYANT ,  JONATHAN D. COMBS ,  STEPHEN J. ROBINSON

IPC: G06F9/30

CPC classification number: G06F9/30043 ,  G06F9/3016 ,  G06F9/3834

Abstract: Apparatuses, methods, and systems relating to memory disambiguation are described. In one embodiment, a processor includes a decoder to decode an instruction into a decoded instruction, an execution unit to execute the decoded instruction, a retirement unit to retire an executed instruction in program order, and a memory disambiguation circuit to allocate an entry in a memory disambiguation table for a first load instruction that is to be flushed for a memory ordering violation, the entry comprising a counter value and an instruction pointer for the first load instruction.

公开(公告)号：US20170147506A1

公开(公告)日：2017-05-25

申请号：US15396623

申请日：2016-12-31

Applicant: INTEL CORPORATION

Inventor： CHRISTOPHER D. BRYANT ,  RAMA S. GOPAL

IPC: G06F12/1036 ,  G06F12/084 ,  G06F12/1009

CPC classification number: G06F12/1009 ,  G06F12/084 ,  G06F12/1027 ,  G06F12/1036 ,  G06F2212/1016 ,  G06F2212/60 ,  G06F2212/62 ,  G06F2212/681 ,  G06F2212/684

Abstract: Methods and apparatus are disclosed for using a shared page miss handler device to satisfy page miss requests of a plurality of devices in a multi-core system. One embodiment of such a method comprises receiving one or more page miss requests from one or more respective requesting devices of the plurality of devices in the multi-core system, and arbitrating to identify a first page miss requests of the one or more requesting devices A page table walk is performed to generate a physical address responsive to the first page miss request. Then the physical address is sent to the corresponding requesting device, or a fault is signaled to an operating system for the corresponding requesting device responsive to the first page miss request.

公开(公告)号：US20170116134A1

公开(公告)日：2017-04-27

申请号：US15396628

申请日：2016-12-31

Applicant: INTEL CORPORATION

Inventor： CHRISTOPHER D. BRYANT ,  RAMA S. GOPAL

IPC: G06F12/1036 ,  G06F12/1009

CPC classification number: G06F12/1009 ,  G06F12/084 ,  G06F12/1027 ,  G06F12/1036 ,  G06F2212/1016 ,  G06F2212/60 ,  G06F2212/62 ,  G06F2212/681 ,  G06F2212/684

Abstract: Methods and apparatus are disclosed for using a shared page miss handler device to satisfy page miss requests of a plurality of devices in a multi-core system. One embodiment of such a method comprises receiving one or more page miss requests from one or more respective requesting devices of the plurality of devices in the multi-core system, and arbitrating to identify a first page miss requests of the one or more requesting devices A page table walk is performed to generate a physical address responsive to the first page miss request. Then the physical address is sent to the corresponding requesting device, or a fault is signaled to an operating system for the corresponding requesting device responsive to the first page miss request.

公开(公告)号：US20170109293A1

公开(公告)日：2017-04-20

申请号：US15396626

申请日：2016-12-31

Applicant: INTEL CORPORATION

Inventor： CHRISTOPHER D. BRYANT ,  RAMA S. GOPAL

IPC: G06F12/1009 ,  G06F12/1027

CPC classification number: G06F12/1009 ,  G06F12/084 ,  G06F12/1027 ,  G06F12/1036 ,  G06F2212/1016 ,  G06F2212/60 ,  G06F2212/62 ,  G06F2212/681 ,  G06F2212/684

Abstract: Methods and apparatus are disclosed for using a shared page miss handler device to satisfy page miss requests of a plurality of devices in a multi-core system. One embodiment of such a method comprises receiving one or more page miss requests from one or more respective requesting devices of the plurality of devices in the multi-core system, and arbitrating to identify a first page miss requests of the one or more requesting devices A page table walk is performed to generate a physical address responsive to the first page miss request. Then the physical address is sent to the corresponding requesting device, or a fault is signaled to an operating system for the corresponding requesting device responsive to the first page miss request.

公开(公告)号：US20160170888A1

公开(公告)日：2016-06-16

申请号：US14566390

申请日：2014-12-10

Applicant: INTEL CORPORATION

Inventor： CHRISTOPHER D. BRYANT ,  STEPHEN J. ROBINSON

IPC: G06F12/08 ,  G06F12/10

CPC classification number: G06F12/0857 ,  G06F9/48 ,  G06F12/0802 ,  G06F2212/1021 ,  G06F2212/1024 ,  G06F2212/281 ,  G06F2212/608 ,  G06F2212/65

Abstract: A first operation associated with a request for a page miss handler may be identified. A second operation associated with a current execution of the page miss handler may also be identified. An age of the first operation and an age of the second operation may be determined. The page miss handler may be interrupted based on the age of the first operation and the age of the second operation by stopping the current execution of the page miss handler for the second operation and starting execution of the page miss handler for the first operation.

Abstract translation: 可以识别与页面未命中处理程序的请求相关联的第一操作。 还可以识别与页面未命中处理程序的当前执行相关联的第二操作。 可以确定第一次手术的年龄和第二次手术的年龄。 可以基于第一操作的年龄和第二操作的年龄来中断页面未命中处理程序，通过停止用于第二操作的页面未命中处理程序的当前执行，并且开始执行第一操作的页面未命中处理程序。