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公开(公告)号:US20230326794A1
公开(公告)日:2023-10-12
申请号:US18207047
申请日:2023-06-07
Applicant: Intel Corporation
Inventor: Leonard P. GULER , Michael HARPER , Suzanne S. RICH , Charles H. WALLACE , Curtis WARD , Richard E. SCHENKER , Paul NYHUS , Mohit K. HARAN , Reken PATEL , Swaminathan SIVAKUMAR
IPC: H01L21/768 , H01L21/033 , H01L21/8234
CPC classification number: H01L21/76897 , H01L21/0337 , H01L21/823412 , H01L21/823475
Abstract: Embodiments disclosed herein include semiconductor devices and methods of forming such devices. In an embodiment a semiconductor device comprises a first interlayer dielectric (ILD), a plurality of source/drain (S/D) contacts in the first ILD, a plurality of gate contacts in the first ILD, wherein the gate contacts and the S/D contacts are arranged in an alternating pattern, and wherein top surfaces of the gate contacts are below top surfaces of the S/D contacts so that a channel defined by sidewall surfaces of the first ILD is positioned over each of the gate contacts, mask layer partially filling a first channel over a first gate contact, and a fill metal filling a second channel over a second gate contact that is adjacent to the first gate contact.
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公开(公告)号:US20210202478A1
公开(公告)日:2021-07-01
申请号:US16727336
申请日:2019-12-26
Applicant: Intel Corporation
Inventor: Biswajeet GUHA , William HSU , Michael HARPER , Leonard P. GULER , Oleg GOLONZKA , Dax M. CRUM , Chung-Hsun LIN , Tahir GHANI
IPC: H01L27/088 , H01L29/06 , H01L29/786 , H01L29/423 , H01L29/08
Abstract: Gate-all-around integrated circuit structures having low aspect ratio isolation structures and subfins, and method of fabricating gate-all-around integrated circuit structures having low aspect ratio isolation structures and subfins, are described. For example, an integrated circuit structure includes a first vertical arrangement of horizontal nanowires above a first subfin. A second vertical arrangement of horizontal nanowires is above a second subfin laterally adjacent the first subfin. An isolation structure is laterally between the first subfin and the second subfin, the isolation structure having a maximum height and a maximum width with a maximum height to maximum width ratio of less than 3:1.
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