公开(公告)号：US20180366204A1

公开(公告)日：2018-12-20

申请号：US15627928

申请日：2017-06-20

Applicant: Intel Corporation

Inventor： Ning WU ,  Robert E. FRICKEY

IPC: G11C16/34 ,  G11C16/04

CPC classification number: G11C16/3427 ,  G11C11/34 ,  G11C11/5642 ,  G11C16/0483

Abstract: An apparatus is described. The apparatus includes a storage device having multiple non volatile memory chips and controller circuitry. The controller circuitry is to implement wear leveling of storage cells of the non volatile memory chips at a granularity of segments of storage cell arrays of the non volatile memory chips that share a same disturber node and that are coupled to a same storage cell array wire to diminish disturb errors.

公开(公告)号：US20190279730A1

公开(公告)日：2019-09-12

申请号：US16357771

申请日：2019-03-19

Applicant: Intel Corporation

Inventor： Ning WU ,  Robert E. FRICKEY

IPC: G11C16/34 ,  G11C16/04

Abstract: An apparatus is described. The apparatus includes a solid state drive having multiple three dimensional stacked FLASH memory chips and controller circuitry. The controller circuitry is to implement wear leveling of storage cells of the FLASH memory chips at a granularity of segments of blocks of said FLASH memory chips that are coupled to a same word line and source gate source node to diminish word line read disturb errors.

公开(公告)号：US20190043566A1

公开(公告)日：2019-02-07

申请号：US16019530

申请日：2018-06-26

Applicant: INTEL CORPORATION

Inventor： Ning WU ,  Shankar NATARAJAN

IPC: G11C11/56 ,  G11C16/10 ,  G11C16/28 ,  G11C29/02 ,  G06F11/10

CPC classification number: G11C11/5642 ,  G06F11/1048 ,  G11C7/04 ,  G11C11/5628 ,  G11C16/10 ,  G11C16/28 ,  G11C29/021 ,  G11C29/028 ,  G11C2211/5634

Abstract: A non-volatile memory receives a request from a controller to read data stored in the memory. Moving read references are adjusted as a function of the temperature of the memory at which the data was written and the temperature of the memory at which the data is to be read. Moving read references may also be adjusted as a function of the retention time of the data to be read and the word line type of the storage elements in which the data is stored.

公开(公告)号：US20190034114A1

公开(公告)日：2019-01-31

申请号：US15842799

申请日：2017-12-14

Applicant: Intel Corporation

Inventor： Shankar NATARAJAN ,  Ning WU

IPC: G06F3/06

Abstract: Techniques for performing background refresh for storage devices using a timestamp from the host are described. In one example, a method involves receiving a timestamp from a host, storing the timestamp in a storage device, and determining a retention time for data stored in one or more blocks of the storage device based on the timestamp relative to a second timestamp indicating when the data was written to the one or more blocks. In response to determining the retention time exceeds a threshold, the storage device moves the data to one or more other blocks of the storage device, which can include interleaving the refresh writes with activity from the host.