公开(公告)号：US20200005516A1

公开(公告)日：2020-01-02

申请号：US16024821

申请日：2018-06-30

Applicant: Intel Corporation

Inventor： MICHAEL APODACA ,  ANKUR SHAH ,  BEN ASHBAUGH ,  BRANDON FLIFLET ,  HEMA NALLURI ,  PATTABHIRAMAN K ,  PETER DOYLE ,  JOSEPH KOSTON ,  JAMES VALERIO ,  MURALI RAMADOSS ,  ALTUG KOKER ,  ADITYA NAVALE ,  PRASOONKUMAR SURTI ,  BALAJI VEMBU

IPC: G06T15/00

Abstract: Apparatus and method for simultaneous command streamers. For example, one embodiment of an apparatus comprises: a plurality of work element queues to store work elements for a plurality of thread contexts, each work element associated with a context descriptor identifying a context storage region in memory; a plurality of command streamers, each command streamer associated with one of the plurality of work element queues, the command streamers to independently submit instructions for execution as specified by the work elements; a thread dispatcher to evaluate the thread contexts including priority values, to tag each instruction with an execution identifier (ID), and to responsively dispatch each instruction including the execution ID in accordance with the thread context; and a plurality of graphics functional units to independently execute each instruction dispatched by the thread dispatcher and to associate each instruction with a thread context based on its execution ID.

公开(公告)号：US20200175643A1

公开(公告)日：2020-06-04

申请号：US16208715

申请日：2018-12-04

Applicant: Intel Corporation

Inventor： TRAVIS SCHLUESSLER ,  ZACK WATERS ,  MICHAEL APODACA ,  JASON SURPRISE ,  PETER DOYLE

IPC: G06T1/20 ,  G06F9/50

Abstract: Embodiments described herein provide data processing device comprising a processor, a memory, and a large draw monitor comprising a processing unit to determine whether a vertex count for a graphics workload exceeds a threshold value, and in response to a determination that the vertex count for the graphics workload exceeds the threshold value, to divide the graphics workload over graphics processing units instantiated on multiple separate tiles. Other embodiments may be described and claimed.

公开(公告)号：US20220366630A1

公开(公告)日：2022-11-17

申请号：US17876358

申请日：2022-07-28

Applicant: Intel Corporation

Inventor： TRAVIS SCHLUESSLER ,  ZACK WATERS ,  MICHAEL APODACA ,  DANIEL JOHNSTON ,  JASON SURPRISE ,  PRASOONKUMAR SURTI ,  SUBRAMANIAM MAIYURAN ,  PETER DOYLE ,  SAURABH SHARMA ,  ANKUR SHAH ,  MURALI RAMADOSS

IPC: G06T15/00 ,  G06T15/40 ,  G06T15/80

Abstract: Position-based rendering apparatus and method for multi-die/GPU graphics processing. For example, one embodiment of a method comprises: distributing a plurality of graphics draws to a plurality of graphics processors; performing position-only shading using vertex data associated with tiles of a first draw on a first graphics processor, the first graphics processor responsively generating visibility data for each of the tiles; distributing subsets of the visibility data associated with different subsets of the tiles to different graphics processors; limiting geometry work to be performed on each tile by each graphics processor using the visibility data, each graphics processor to responsively generate rendered tiles; and wherein the rendered tiles are combined to generate a complete image frame.

公开(公告)号：US20210272349A1

公开(公告)日：2021-09-02

申请号：US17306769

申请日：2021-05-03

Applicant: Intel Corporation

Inventor： TRAVIS SCHLUESSLER ,  ZACK WATERS ,  MICHAEL APODACA ,  DANIEL JOHNSTON ,  JASON SURPRISE ,  PRASOONKUMAR SURTI ,  SUBRAMANIAM MAIYURAN ,  PETER DOYLE ,  SAURABH SHARMA ,  ANKUR SHAH ,  MURALI RAMADOSS

IPC: G06T15/00 ,  G06T15/40 ,  G06T15/80

Abstract: Position-based rendering apparatus and method for multi-die/GPU graphics processing. For example, one embodiment of a method comprises: distributing a plurality of graphics draws to a plurality of graphics processors; performing position-only shading using vertex data associated with tiles of a first draw on a first graphics processor, the first graphics processor responsively generating visibility data for each of the tiles; distributing subsets of the visibility data associated with different subsets of the tiles to different graphics processors; limiting geometry work to be performed on each tile by each graphics processor using the visibility data, each graphics processor to responsively generate rendered tiles; and wherein the rendered tiles are combined to generate a complete image frame.