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公开(公告)号:US20160364143A1
公开(公告)日:2016-12-15
申请号:US15175697
申请日:2016-06-07
Applicant: Intel Corporation
Inventor: RANDALL K. WEBB , JAWAD B. KHAN , RICHARD L. COULSON , KNUT S. GRIMSRUD , BRIAN M. YABLON
IPC: G06F3/06
CPC classification number: G06F3/061 , G06F3/0655 , G06F3/0688 , G06F11/1008 , G06F11/1016 , G06F11/1068 , G06F12/0246 , G06F2212/7201
Abstract: The present disclosure relates to an extensible memory hub. An apparatus may include a first extensible non-volatile memory (NVM) hub (EN hub). The first EN hub includes an upstream interface port configured to couple the first EN hub to an NVM controller or to a second EN hub; a downstream interface port configured to couple the first EN hub to a third EN hub or to a NVM device; at least one NVM device port, each NVM device port configured to couple the first EN hub to a respective NVM device via a NVM channel; and an EN hub controller. The EN hub controller includes command logic configured to initialize the first EN hub in response to an initialize chain command from the NVM controller, the initializing including enumerating each NVM device coupled to the first EN hub and each of one or more associated NVM dies.
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公开(公告)号:US20170262029A1
公开(公告)日:2017-09-14
申请号:US15068827
申请日:2016-03-14
Applicant: INTEL CORPORATION
Inventor: MICHAEL D. NELSON , JAWAD B. KHAN , RANDALL K. WEBB , KNUT S. GRIMSRUD , WAYNE J. ALLEN
CPC classification number: G06F1/20 , H05K7/1439 , H05K7/1452 , H05K7/1457 , H05K7/1487
Abstract: A data storage system with a parallel array of dense memory cards and high airflow is described. In one example, a rack-mount enclosure has a horizontal plane board with memory connectors and external interfaces. Memory cards each have a connector to connect to a respective memory connector of the horizontal plane board, each memory card extending parallel to each other memory card from the front of the enclosure and extending orthogonally from the first side of the horizontal plane board. A power supply proximate the rear of the enclosure and the first side of the horizontal plane board provides power to the memory cards through the memory card connectors and has a fan to pull air from the front of the enclosure between the memory cards and to push air out the rear of the enclosure.
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公开(公告)号:US20170091127A1
公开(公告)日:2017-03-30
申请号:US14866310
申请日:2015-09-25
Applicant: Intel Corporation
Inventor: JAWAD B. KHAN , RANDALL K. WEBB , KELVIN D. GREEN , BRIAN R. MCFARLANE
CPC classification number: G06F13/1668 , G06F13/102 , G06F13/4068 , G06F13/4282
Abstract: Examples may include techniques to couple with a storage device via multiple communication ports. A first communication port at the storage device may be configurable to couple with at least one other storage device, a field programmable gate array (FPGA)/programmable logic or application-specific integrated circuit (ASIC) via a serial communication link. A second communication port at the storage device is arranged to couple with a host computing device.
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公开(公告)号:US20150378814A1
公开(公告)日:2015-12-31
申请号:US14314181
申请日:2014-06-25
Applicant: Intel Corporation
Inventor: RANDALL K. WEBB , JAWAD B. KHAN , RICHARD L. COULSON , KNUT S. GRIMSRUD , BRIAN M. YABLON
CPC classification number: G06F3/061 , G06F3/0655 , G06F3/0688 , G06F11/1008 , G06F11/1016 , G06F11/1068 , G06F12/0246 , G06F2212/7201
Abstract: The present disclosure relates to an extensible memory hub. An apparatus may include a first extensible non-volatile memory (NVM) hub (EN hub). The first EN hub includes an upstream interface port configured to couple the first EN hub to an NVM controller or to a second EN hub; a downstream interface port configured to couple the first EN hub to a third EN hub or to a NVM device; at least one NVM device port, each NVM device port configured to couple the first EN hub to a respective NVM device via a NVM channel; and an EN hub controller. The EN hub controller includes command logic configured to initialize the first EN hub in response to an initialize chain command from the NVM controller, the initializing including enumerating each NVM device coupled to the first EN hub and each of one or more associated NVM dies.
Abstract translation: 本公开涉及可扩展存储器集线器。 装置可以包括第一可扩展非易失性存储器(NVM)集线器(EN集线器)。 第一个EN集线器包括被配置为将第一EN集线器耦合到NVM控制器或第二EN集线器的上游接口端口; 下游接口端口,被配置为将第一EN集线器耦合到第三EN集线器或NVM设备; 至少一个NVM设备端口,每个NVM设备端口被配置为经由NVM信道将所述第一EN集线器耦合到相应的NVM设备; 和一个EN集线器控制器。 EN集线器控制器包括命令逻辑,其被配置为响应于来自NVM控制器的初始化链命令初始化第一EN集线器,初始化包括枚举耦合到第一EN集线器的每个NVM设备以及一个或多个相关联的NVM管芯中的每一个。
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