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公开(公告)号:US20190200450A1
公开(公告)日:2019-06-27
申请号:US16328412
申请日:2017-09-19
Applicant: Intel Corporation
Inventor: Richard I. MELLITZ , Brandon GORE , Beom-Taek LEE
CPC classification number: H05K1/0243 , H01L23/66 , H01R12/716 , H05K1/028 , H05K1/0298 , H05K1/112 , H05K1/144 , H05K1/181 , H05K2201/042 , H05K2201/10189 , H05K2201/10356 , H05K2201/10378 , H05K2201/10734
Abstract: Methods and apparatus for utilizing flexible (flex) circuit technology and/or axial cable to facilitate routing of high-speed data channels are described herein. Under one aspect, a high-speed data channel if routed between an integrated circuit (IC) and a high-speed data connector mounted to a multilayer printed circuit board as part of a circuit assembly. The circuit assembly includes a signal pathway providing a high-speed data channel from the integrated circuit to the high-speed data connector, wherein a portion of the signal pathway includes a flex circuit or axial cable.
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公开(公告)号:US20210289617A1
公开(公告)日:2021-09-16
申请号:US17333723
申请日:2021-05-28
Applicant: Intel Corporation
Inventor: Richard I. MELLITZ , Brandon GORE , Beom-Taek LEE
Abstract: Methods and apparatus to facilitate routing of high-speed data channels are described herein. Under one aspect, a high-speed data channel is routed between an integrated circuit (IC) and a high-speed data connector mounted to a multilayer printed circuit board as part of a circuit assembly. The circuit assembly includes a signal pathway providing a high-speed data channel from the integrated circuit to the high-speed data connector, wherein a portion of the signal pathway includes an axial cable, such as a twin axial cable. The high-speed data channel may comprise a multi-lane data channel and may be bi-directional.
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