公开(公告)号：US20200279069A1

公开(公告)日：2020-09-03

申请号：US16649588

申请日：2017-12-28

Applicant: Intel Corporation

Inventor： Ranjith KUMAR ,  Mark T. BOHR ,  Ruth A. BRAIN ,  Marni NABORS ,  Tai-Hsuan WU ,  Sourav CHAKRAVARTY

IPC: G06F30/3953 ,  H01L23/50 ,  H01L23/522

Abstract: An integrated circuit structure includes a metal level comprising a plurality of interconnect lines along a first direction. A cell is on the metal level, wherein one or more of the plurality of interconnect lines that extend through the cell comprise a power shared track that is segmented inside the cell into one or more power segments and one or more signal segments so that both power and signals share a same track.

公开(公告)号：US20240362391A1

公开(公告)日：2024-10-31

申请号：US18769148

申请日：2024-07-10

Applicant: Intel Corporation

Inventor： Ranjith KUMAR ,  Quan SHI ,  Mark T. BOHR ,  Andrew W. YEOH ,  Sourav CHAKRAVARTY ,  Barbara A. CHAPPELL ,  M. Clair WEBB

IPC: G06F30/392 ,  G06F30/20 ,  G06F30/337 ,  G06F30/347 ,  G06F30/373 ,  G06F30/3947 ,  H01L27/02 ,  H01L27/092 ,  H01L27/118

CPC classification number: G06F30/392 ,  G06F30/337 ,  G06F30/347 ,  H01L27/0207 ,  H01L27/0924 ,  H01L27/11807 ,  G06F30/20 ,  G06F30/373 ,  G06F30/3947 ,  H01L2027/11875

Abstract: Multi version library cell handling and integrated circuit structures fabricated therefrom are described. In an example, an integrated circuit structure includes a plurality of gate lines parallel along a first direction of a substrate and having a pitch along a second direction orthogonal to the first direction. A first version of a cell type is over a first portion of the plurality of gate lines, the first version of the cell type including a first plurality of interconnect lines having a second pitch along the second direction, the second pitch less than the first pitch.

公开(公告)号：US20220149075A1

公开(公告)日：2022-05-12

申请号：US17585101

申请日：2022-01-26

Applicant: Intel Corporation

Inventor： Ranjith KUMAR ,  Quan SHI ,  Mark T. BOHR ,  Andrew W. YEOH ,  Sourav CHAKRAVARTY ,  Barbara A. CHAPPELL ,  M. Clair WEBB

IPC: H01L27/118 ,  G06F30/392 ,  H01L27/02 ,  H01L27/092

Abstract: Multi version library cell handling and integrated circuit structures fabricated therefrom are described. In an example, an integrated circuit structure includes a plurality of gate lines parallel along a first direction of a substrate and having a pitch along a second direction orthogonal to the first direction. A first version of a cell type is over a first portion of the plurality of gate lines, the first version of the cell type including a first plurality of interconnect lines having a second pitch along the second direction, the second pitch less than the first pitch.