公开(公告)号：US20190295936A1

公开(公告)日：2019-09-26

申请号：US15926531

申请日：2018-03-20

Applicant: Intel Corporation

Inventor： ZHIGUO QIAN ,  KALADHAR RADHAKRISHNAN ,  KEMAL AYGUN

IPC: H01L23/498 ,  H01L23/00 ,  H01L21/68 ,  H01L21/48

Abstract: The present disclosure is directed to systems and methods for improving the impedance matching of semiconductor package substrates by incorporating one or more magnetic build-up layers proximate relatively large diameter, relatively high capacitance, conductive pads formed on the lower surface of the semiconductor package substrate. The one or more magnetic layers may be formed using a magnetic build-up material deposited on the lower surface of the semiconductor package substrate. Vias conductively coupling the conductive pads to bump pads on the upper surface of the semiconductor package substrate pass through and are at least partially surrounded by the magnetic build-up material.

公开(公告)号：US20180007782A1

公开(公告)日：2018-01-04

申请号：US15201422

申请日：2016-07-02

Applicant: Intel Corporation

Inventor： ZHICHAO ZHANG ,  XIANG LI ,  KEMAL AYGUN ,  ZHIGUO QIAN ,  TOLGA MEMIOGLU

IPC: H05K1/02 ,  G11C5/06 ,  G06F1/16 ,  G11C5/04 ,  H05K1/18 ,  H01R12/73

CPC classification number: G06F1/16 ,  G11C5/04 ,  G11C5/06 ,  G11C5/063 ,  H01R13/6464 ,  H05K1/0231 ,  H05K1/117 ,  H05K1/141 ,  H05K1/162 ,  H05K2201/10159 ,  H05K2201/10189

Abstract: One embodiment provides an apparatus. The apparatus includes a dual in-line memory module (DIMM). The DIMM includes at least one memory module integrated circuit (IC); a DIMM printed circuit board (PCB); a plurality of DIMM PCB contacts; and a capacitive structure. Each DIMM PCB contact is to couple the memory module IC to a respective DIMM connector pin. The capacitive structure is to provide a mutual capacitance between a first DIMM connector signal pin and a second DIMM connector signal pin.