公开(公告)号：US20190037689A1

公开(公告)日：2019-01-31

申请号：US15849043

申请日：2017-12-20

Applicant: Intel Corporation

Inventor： DAQIAO DU ,  ZHEN ZHOU ,  JUN LIAO ,  JAMES A. MCCALL ,  XIANG LI ,  KAI XIAO ,  ZHICHAO ZHANG

IPC: H05K1/02 ,  H05K1/05 ,  H05K1/11 ,  H01R12/72

Abstract: A system for a three-dimensional (“3D”) printed circuit board (“PCB”) to printed circuit board interface is provided. A first PCB includes first landing pads disposed on one or more edges of the first PCB. The first landing pads electrically couple to conductive pins or second landing pads disposed on a second PCB. The second landing pads may be disposed in a slot in the second PCB. The interface between the first landing pads and the second landing pads may provide various advantages over traditional PCB to PCB interfaces, such as, improved signal integrity, improved power integrity, increased contact density, decreased clock jitter, etc.

公开(公告)号：US20180007782A1

公开(公告)日：2018-01-04

申请号：US15201422

申请日：2016-07-02

Applicant: Intel Corporation

Inventor： ZHICHAO ZHANG ,  XIANG LI ,  KEMAL AYGUN ,  ZHIGUO QIAN ,  TOLGA MEMIOGLU

IPC: H05K1/02 ,  G11C5/06 ,  G06F1/16 ,  G11C5/04 ,  H05K1/18 ,  H01R12/73

CPC classification number: G06F1/16 ,  G11C5/04 ,  G11C5/06 ,  G11C5/063 ,  H01R13/6464 ,  H05K1/0231 ,  H05K1/117 ,  H05K1/141 ,  H05K1/162 ,  H05K2201/10159 ,  H05K2201/10189

Abstract: One embodiment provides an apparatus. The apparatus includes a dual in-line memory module (DIMM). The DIMM includes at least one memory module integrated circuit (IC); a DIMM printed circuit board (PCB); a plurality of DIMM PCB contacts; and a capacitive structure. Each DIMM PCB contact is to couple the memory module IC to a respective DIMM connector pin. The capacitive structure is to provide a mutual capacitance between a first DIMM connector signal pin and a second DIMM connector signal pin.

公开(公告)号：US20160087376A1

公开(公告)日：2016-03-24

申请号：US14492967

申请日：2014-09-22

Applicant: INTEL CORPORATION

Inventor： CHUNG-HAO CHEN ,  YUN LING ,  XIANG LI

IPC: H01R13/652 ,  H01R13/6597

CPC classification number: H01R12/79 ,  H01R13/6584 ,  H01R13/6592

Abstract: Techniques for signal grounding are described herein. The techniques include a conductive element conductively coupled to an exposed ground pad of a circuit board. The conductive element is to conductively couple to a shield of a signaling link, and thereby conductively coupling the shield to the exposed ground pad.

Abstract translation: 本文描述了用于信号接地的技术。 这些技术包括导电元件与导电板的暴露的接地焊盘导电耦合。 导电元件导电地耦合到信令链路的屏蔽，从而导电地将屏蔽耦合到暴露的接地焊盘。

公开(公告)号：US20190044289A1

公开(公告)日：2019-02-07

申请号：US15900450

申请日：2018-02-20

Applicant: Intel Corporation

Inventor： XIANG LI ,  JAEJIN LEE ,  JUN LIAO ,  HAO-HAN HSU ,  GEORGE VERGIS ,  YUN LING ,  DONG-HO HAN ,  YUNHUI CHU

IPC: H01R13/6594 ,  H01R12/73 ,  H01R43/20

Abstract: A shielded SODIMM system for reducing RF emissions of a SODIMM connector is disclosed herein. SODIMM connector RFI presently interferes with connectivity and is also an obstacle for higher speed memory applications. The shielded SODIMM system includes a SODIMM connector that is at least partially housed by a SODIMM connector shield, to partially and/or substantially reduce or block RF emissions from the SODIMM connector. The SODIMM connector shield is at least partially conductive and is coupled to landing pads on a surface of a motherboard printed circuit board (“PCB”). The landing pads of the motherboard PCB that are coupled to the SODIMM connector shield are coupled to ground, which grounds the SODIMM connector shield. Grounding the SODIMM connector shield that at least partially houses the SODIMM connector reduces RF emissions from the SODIMM connector during information transfer operations.