公开(公告)号：US11626375B2

公开(公告)日：2023-04-11

申请号：US17304057

申请日：2021-06-14

Applicant: Kioxia Corporation

Inventor： Hideo Wada

IPC: H01L25/065 ,  H01L23/00 ,  H01L25/18 ,  H01L25/00

Abstract: A semiconductor memory device includes: a stack above a peripheral circuit on a first substrate, in which first conductive layers and first insulation layers are alternately stacked in a first direction each; a first pillar through the stack, in which a semiconductor layer and each first conductive layer form a memory cell at their intersection; a second substrate including a first region above the stack and the first pillar, being connected to a semiconductor layer, and a second region juxtaposed with the first region in a second direction; a second insulation layer through the second substrate, insulating the regions from each other; and a second conductive layer including a first portion through the second substrate, and a second portion extending in the second direction above the second substrate and including a part defining a bonding pad. The second portion overlaps with the second insulation layer in the first direction.

公开(公告)号：US11411016B2

公开(公告)日：2022-08-09

申请号：US17005535

申请日：2020-08-28

Applicant: KIOXIA CORPORATION

Inventor： Tomoya Sanuki ,  Keisuke Nakatsuka ,  Hiroshi Maejima ,  Kenichiro Yoshii ,  Takashi Maeda ,  Hideo Wada

IPC: H01L27/11565 ,  H01L25/18 ,  H01L25/00 ,  H01L23/00 ,  H01L27/11578 ,  H01L27/11575 ,  H01L27/1157 ,  H01L27/11563 ,  H01L27/11568

Abstract: A semiconductor memory device includes a first chip and a second chip overlaid on the first chip. The second chip includes a memory cell array provided between a second semiconductor substrate and the first chip in a first direction, and first and second wires between the memory cell array and the first chip. The memory cell array includes three or more stacked bodies regularly arranged in a second direction perpendicular to the first direction and semiconductor layers extending in the stacked bodies in the first direction. Each of the stacked bodies includes gate electrodes stacked in the first direction. The first and second wires are aligned in the second direction with a gap therebetween.