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    SEMICONDUCTOR DEVICE, SEMICONDUCTOR MEMORY DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
    2.
    发明申请
    SEMICONDUCTOR DEVICE, SEMICONDUCTOR MEMORY DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20230090044A1

    公开(公告)日：2023-03-23

    申请号：US17687407

    申请日：2022-03-04

    Applicant: Kioxia Corporation

    Inventor： Tomoki ISHIMARU ,  Shinji MORI ,  Kazuhiro MATSUO ,  Keiichi SAWA ,  Kenichiro TORATANI

    IPC: H01L29/786 ,  H01L27/108 ,  H01L29/66

    Abstract: A semiconductor device of an embodiment includes a first electrode, a second electrode, a first oxide semiconductor layer between the first electrode and the second electrode, the first oxide semiconductor layer containing in, Zn, and a first metal element, and the first metal element being at least one metal of Ga, Mg, or Mn, a second oxide semiconductor layer between the first oxide semiconductor layer and the second electrode, the second oxide semiconductor layer containing In, Zn, and the first metal element, a third oxide semiconductor layer between the first oxide semiconductor layer and the second oxide semiconductor layer, the third oxide semiconductor layer containing in, Zn, and a second metal element, the second metal element being at least one metal of Al, Hf, La, Sn, Ta, Ti, W, Y, or Zr, a gate electrode facing the third oxide semiconductor layer, and a gate insulating.

    SEMICONDUCTOR STORAGE DEVICE
    4.
    发明申请
    SEMICONDUCTOR STORAGE DEVICE 有权

    公开(公告)号：US20220310640A1

    公开(公告)日：2022-09-29

    申请号：US17460967

    申请日：2021-08-30

    Applicant: Kioxia Corporation

    Inventor： Natsuki FUKUDA ,  Ryota NARASAKI ,  Takashi KURUSU ,  Yuta KAMIYA ,  Kazuhiro MATSUO ,  Shinji MORI ,  Shoji HONDA ,  Takafumi OCHIAI ,  Hiroyuki YAMASHITA ,  Junichi KANEYAMA ,  Ha HOANG ,  Yuta SAITO ,  Kota TAKAHASHI ,  Tomoki ISHIMARU ,  Kenichiro TORATANI

    IPC: H01L27/11556 ,  H01L27/11519 ,  H01L27/11565 ,  H01L27/11582

    Abstract: A semiconductor storage device includes a first conductive layer that extends in a first direction; a second conductive layer that extends in the first direction and is arranged with the first conductive layer in a second direction; a first insulating layer that is provided between the first conductive layer and the second conductive layer; a semiconductor layer that extends in the second direction and faces the first conductive layer, the second conductive layer, and the first insulating layer in a third direction; a first charge storage layer that is provided between the first conductive layer and the semiconductor layer; a second charge storage layer that is provided between the second conductive layer and the semiconductor layer; a first high dielectric constant layer that is provided between the first conductive layer and the first charge storage layer; and a second high dielectric constant layer provided between the second conductive layer and the second charge storage layer. At least a portion of the first charge storage layer faces the second charge storage layer without the second high dielectric constant layer being interposed between the portion of the first charge storage layer and the second charge storage layer in the second direction.

    SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY DEVICE
    5.
    发明申请
    SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY DEVICE 有权

    公开(公告)号：US20220262954A1

    公开(公告)日：2022-08-18

    申请号：US17734960

    申请日：2022-05-02

    Applicant: Kioxia Corporation

    Inventor： Tomoki ISHIMARU ,  Shinji MORI ,  Kazuhiro MATSUO ,  Keiichi SAWA ,  Akifumi GAWASE

    IPC: H01L29/786 ,  H01L27/108 ,  H01L29/267 ,  H01L29/08 ,  H01L29/417 ,  H01L29/40

    Abstract: A semiconductor device of an embodiment includes a first electrode, a second electrode, a first metallic region provided between the first electrode and the second electrode and includes at least one metallic element selected from the group consisting of indium (In), gallium (Ga), zinc (Zn), aluminum (Al), magnesium (Mg), manganese (Mn), titanium (Ti), tungsten (W), molybdenum (Mo), and tin (Sn), a second metallic region provided between the first metallic region and the second electrode and includes the at least one metallic element, a semiconductor region provided between the first metallic region and the second metallic region and includes the at least one metallic element and oxygen (O), an insulating region provided between the first metallic region and the second metallic region and is surrounded by the semiconductor region, a gate electrode surrounding the semiconductor region, and a gate insulating layer provided between the semiconductor region and the gate electrode.

    SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY DEVICE
    6.
    发明公开
    SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY DEVICE 审中-公开

    公开(公告)号：US20230290882A1

    公开(公告)日：2023-09-14

    申请号：US17897050

    申请日：2022-08-26

    Applicant: KIOXIA CORPORATION

    Inventor： Ha HOANG ,  Kazuhiro MATSUO ,  Tomoki ISHIMARU ,  Kenichiro TORATANI

    IPC: H01L29/786 ,  H01L27/108

    CPC classification number: H01L29/78642 ,  H01L27/1082 ,  H01L29/78693

    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, and an oxide semiconductor layer provided between the first electrode and the second electrode and including a first region, a second region between the first region and the second electrode, and a third region between the first region and the second region. A gate electrode surrounds the third region, and a gate insulating layer is between the gate electrode and the third region. A first resistivity of the first region is higher than a second resistivity of the second region. A first distance between the first electrode and the gate electrode in a first direction from the first electrode toward the second electrode is shorter than a second distance between the gate electrode and the second electrode in the first direction.

    SEMICONDUCTOR MEMORY DEVICE
    7.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE 有权

    公开(公告)号：US20230088864A1

    公开(公告)日：2023-03-23

    申请号：US17687379

    申请日：2022-03-04

    Applicant: Kioxia Corporation

    Inventor： Yuta KAMIYA ,  Kazuhiro MATSUO ,  Kota TAKAHASHI ,  Masaya TODA ,  Tomoki ISHIMARU

    IPC: H01L27/108 ,  H01L49/02 ,  H01L29/786 ,  H01L29/66

    Abstract: A semiconductor memory device according to an embodiment includes: a first oxide semiconductor layer between a first conductive layer and a second conductive layer; a first gate electrode; a first electrode; a second electrode; a first capacitor insulating film between the first electrode and the second electrode including a first region and a second region between the first region and the second electrode, concentration of the Ti is higher in the second region than the first region; a third conductive layer; a second oxide semiconductor layer between the third conductive layer and a fourth conductive layer; a second gate electrode; a third electrode; a fourth electrode; and a second capacitor insulating film between the third electrode and the fourth electrode, and including a third region and a fourth region between the third region and the fourth electrode, concentration of Ti is higher in the fourth region than the third region.

    SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY DEVICE
    8.
    发明申请
    SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY DEVICE 有权

    公开(公告)号：US20210305431A1

    公开(公告)日：2021-09-30

    申请号：US17022328

    申请日：2020-09-16

    Applicant: Kioxia Corporation

    Inventor： Tomoki ISHIMARU ,  Shinji MORI ,  Kazuhiro MATSUO ,  Keiichi SAWA ,  Akifumi GAWASE

    IPC: H01L29/786 ,  H01L27/108 ,  H01L29/08 ,  H01L29/417 ,  H01L29/40 ,  H01L29/267

    Abstract: A semiconductor device of an embodiment includes a first electrode, a second electrode, a first metallic region provided between the first electrode and the second electrode and includes at least one metallic element selected from the group consisting of indium (In), gallium (Ga), zinc (Zn), aluminum (Al), magnesium (Mg), manganese (Mn), titanium (Ti), tungsten (W), molybdenum (Mo), and tin (Sn), a second metallic region provided between the first metallic region and the second electrode and includes the at least one metallic element, a semiconductor region provided between the first metallic region and the second metallic region and includes the at least one metallic element and oxygen (O), an insulating region provided between the first metallic region and the second metallic region and is surrounded by the semiconductor region, a gate electrode surrounding the semiconductor region, and a gate insulating layer provided between the semiconductor region and the gate electrode.

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