公开(公告)号：US4207479A

公开(公告)日：1980-06-10

申请号：US809892

申请日：1977-06-24

申请人： Keizo Yamamoto ,  Charles C. Austin

发明人： Keizo Yamamoto ,  Charles C. Austin

IPC分类号： H03K17/96 ,  H03K17/00 ,  H03K3/26

CPC分类号： G04G21/08 ,  H03K17/9645 ,  Y10T307/766

摘要： A touch sensitive switch arrangement with an I.sup.2 L (Integrated Injection Logic) structure includes a battery power source, a current limiter, an injector, a first-stage and second-stage switching transistors being both supplied with current from the injector, a first touch electrode connected to the positive polarity of the battery power source and a second touch electrode connected to the base of the first-stage switching transistor with electrical isolation from the first touch electrode.

摘要翻译： 具有I2L（集成注入逻辑）结构的触摸敏感开关装置包括电池电源，限流器，注入器，第一级和第二级开关晶体管，两者都从注射器供应电流，第一触摸电极 连接到电池电源的正极性和与第一触摸电极电隔离的连接到第一级开关晶体管的基极的第二触摸电极。

公开(公告)号：US5311069A

公开(公告)日：1994-05-10

申请号：US756057

申请日：1991-09-06

申请人： Charles C. Austin

发明人： Charles C. Austin

IPC分类号： H02P6/12 ,  H02P6/08 ,  H02P6/24 ,  H03K17/06 ,  H03K17/16 ,  G06G7/12 ,  H03K5/153

CPC分类号： H02P6/24 ,  H02P6/08 ,  H03K17/063 ,  H03K17/166

摘要： The present invention provides driver circuitry for commutated inductive loads, and in particular, inductive loads employed in multi-pole DC brushless motors. The preferred embodiment of the present invention typically implements three pull-up and three pull-down drivers for motor control. The pull-down driver circuit described in the present invention can be configured to be adjusted by an external component of the integrated circuit implementation in order for controlling turn-off transients. Voltage transients due to changes in load current in the control loop of the pull-down driver circuit can be minimized or deterministically controlled by controlling the rate of change of the input voltage. For the case of when the load current is to be completely switched from one inductor to another inductor, an additional unity gain buffer coupled to the input voltage is inserted into the control loop of the pull-down driver circuit for reducing the voltage transients that can result. The output voltage rise and fall times of the pull-up driver circuit of the present invention can be controlled by means of an accurate clock rate, a capacitance ratio value, an arbitrary voltage supply or by any combination of the above means. The present invention also provides circuitry for controlling the pull-up driver circuit and the pull-down driver circuits as required to assert the floating operation and as well dynamic breaking operation. The present invention is able to assert these operations by operating from either the power supply or from an energy storage capacitor that is charged to a value closely approximating the power supply voltage should the power supply be removed.

摘要翻译： 本发明提供用于换向电感负载的驱动电路，特别是用于多极直流无刷电动机的感性负载。 本发明的优选实施例通常实现用于马达控制的三个上拉和三个下拉驱动器。 本发明中描述的下拉驱动器电路可以被配置为通过集成电路实现的外部部件进行调整，以便控制关断瞬变。 可以通过控制输入电压的变化率来最小化或确定性地控制由于下拉驱动器电路的控制环路中的负载电流变化引起的电压瞬变。 对于将负载电流从一个电感器完全切换到另一个电感器的情况，将耦合到输入电压的附加单位增益缓冲器插入到下拉驱动器电路的控制回路中，以减少可能的电压瞬变 结果。 本发明的上拉驱动器电路的输出电压上升和下降时间可以通过精确的时钟速率，电容比值，任意电压供给或上述装置的任意组合来控制。 本发明还提供用于控制上拉驱动器电路和下拉驱动器电路的电路，用于断言浮动操作以及动态断开操作。 本发明能够通过从电源或从被充电的能量存储电容器操作到断开电源时接近电源电压的值来断言这些操作。

公开(公告)号：US4791323A

公开(公告)日：1988-12-13

申请号：US922536

申请日：1986-10-23

申请人： Charles C. Austin

发明人： Charles C. Austin

IPC分类号： H03K19/094 ,  H03K3/3565 ,  H03K19/00 ,  H03K19/0185 ,  H03K19/0948 ,  H03K19/092 ,  H03K17/16 ,  H03K17/687

CPC分类号： H03K19/0013 ,  H03K19/018521 ,  H03K3/3565

摘要： A TTL/CMOS interface circuit comprised entirely of CMOS components. An input gain stage comprised of transistors of a single conductivity type is provided whose gain is established by the ratio of the geometric size of the transistors. In the preferred embodiment of the present invention, the input gain stage is comprised of N channel transistors to a void process related mismatches. An inverter stage has a switching threshold set to optimally operate with the output of the input gain stage. The voltage at the inverter stage is tied to the power supply voltage to supply an upper voltage limit. In order to provide for zero power operation for input signals close the value of the supply voltage, a transistor is provided to cut current flow in the input stage for input signals within a threshold voltage of the supply voltage. The present circuit may also be utilized as to allow zero power operation for input signals close to ground.

摘要翻译： 一个完全由CMOS元件组成的TTL / CMOS接口电路。 提供了由单导电型晶体管构成的输入增益级，其增益由晶体管的几何尺寸的比率确定。 在本发明的优选实施例中，输入增益级由N沟道晶体管组成，与无效过程相关的不匹配。 反相器级具有设置为与输入增益级的输出最佳操作的开关阈值。 逆变器级的电压与电源电压相关，以提供上限电压。 为了提供输入信号的零功率操作，关闭电源电压的值，提供晶体管以在输入级中切断电源电压的阈值电压内的输入信号的电流。 本电路还可以用于允许接近地面的输入信号的零功率操作。

公开(公告)号：US06578123B1

公开(公告)日：2003-06-10

申请号：US08978169

申请日：1997-11-25

申请人： Charles C. Austin ,  Kevin Feshangchi ,  Jeff Harth

发明人： Charles C. Austin ,  Kevin Feshangchi ,  Jeff Harth

IPC分类号： G06F1200

CPC分类号： G06F12/0292 ,  G06F2212/206

摘要： Apparatus for flexibly locating the data page on which the peripheral registers are located. External hardware contentions are eliminated because the peripheral registers can be relocated anywhere in the system address space. Hardware design is therefore much more flexible. Further, because the present invention allows peripheral registers to overlay internal data memory, data transfers can be carried out between data and peripherals using the same data page pointer. No intermediate pointer loading operations are required and memory operations to the peripheral registers can be carried out at maximum speed. The present invention allows peripheral registers to overlay data memory in a manner that permits the overlaid memory to be recovered and used for other purposes. Processor program code can be designed to overlay internal data memory with the peripheral registers while performing data transfers between the data memory and the peripheral registers. The overlaid data memory is not accessible while it is overlaid. Then, after completing transfers, the peripheral registers can be relocated elsewhere so that the underlying internal data memory is recovered. The underlying data memory is not disturbed when writing to the overlaying peripheral registers.

摘要翻译： 用于灵活定位外围寄存器所在的数据页的装置。 外部硬件争用被消除，因为外围寄存器可以重新定位在系统地址空间的任何地方。 因此，硬件设计更加灵活。 此外，由于本发明允许外设寄存器覆盖内部数据存储器，所以可以使用相同数据页指针在数据和外设之间进行数据传输。 不需要中间指针加载操作，并且可以以最大速度执行对外设寄存器的存储器操作。 本发明允许外围寄存器以允许重叠的存储器被恢复并用于其他目的的方式覆盖数据存储器。 处理器程序代码可以设计为在数据存储器和外设寄存器之间执行数据传输时将内部数据存储器与外设寄存器进行重叠。 覆盖的数据存储器在重叠时不可访问。 然后，完成传输后，外设寄存器可以重新定位到其他位置，以便恢复底层的内部数据存储器。 写入覆盖的外设寄存器时，底层数据存储器不会受到干扰。

公开(公告)号：US5351465A

公开(公告)日：1994-10-04

申请号：US46018

申请日：1993-04-12

申请人： Robert W. Fortnam ,  Charles C. Austin

发明人： Robert W. Fortnam ,  Charles C. Austin

IPC分类号： B65B43/34 ,  B65B43/26 ,  B65B13/32

CPC分类号： B65B43/34

摘要： A method and apparatus for parting containers comprising a first strip spring and a second strip spring, each strip spring extending along a first axis. The two strip springs have substantially flat first ends that are joined together, and substantially bowed second ends. The second ends of the first and second strip springs are bowed in a substantially concave configuration relative to the first axis. A guide block having a groove formed therethrough receives the two strip springs and places the springs in intimate facing contact with each other. The guide block groove extends for a short distance along the first axis, and the strip springs are adapted to slide through the groove along the first axis. When the strip springs move relative to the guide block along the first axis in a direction away from the first ends, the second ends of the strip springs move into close juxtaposition with each other, and when the strip springs move relative to the guide block in the opposite direction the strip spring second ends spread apart.

摘要翻译： 一种用于分离容器的方法和装置，包括第一带状弹簧和第二带状弹簧，每个带状弹簧沿着第一轴线延伸。 两个带状弹簧具有基本平坦的第一端，它们连接在一起，并且具有大致弯曲的第二端。 第一和第二带状弹簧的第二端相对于第一轴线以大致凹形的构造弯曲。 具有形成在其上的凹槽的引导块容纳两个带状弹簧并使弹簧彼此亲密地相接触。 引导块槽沿着第一轴线延伸短距离，并且带状弹簧适于沿第一轴线滑过槽。 当带状弹簧沿着第一轴线沿远离第一端的方向相对于引导块移动时，带状弹簧的第二端彼此相互并排移动，并且当带状弹簧相对于引导块移动时 条带弹簧第二端相反的方向分开。

公开(公告)号：US5406150A

公开(公告)日：1995-04-11

申请号：US934860

申请日：1992-08-24

申请人： Charles C. Austin

发明人： Charles C. Austin

IPC分类号： H02P6/08 ,  G05F1/563 ,  H02M3/156 ,  H02M7/5387 ,  H02P27/06 ,  H02P27/08 ,  H03K17/695 ,  H03K17/687

CPC分类号： H02P27/06 ,  G05F1/563 ,  H02M3/156 ,  H02M7/53871 ,  H02P27/08

摘要： The present invention provides a system for controlling current through inductive elements by automatically switching between a pulse width modulation mode and a linear mode, depending upon the current demands of the inductive elements. A time-base circuit provides periodic pulses that allow current to flow through an inductive device. The current through the inductive device increases over time. If the current through the inductive device exceeds a specified value, the current is shut off until the next pulse from the time-base circuit. After the power supply current has been shut off, current through the inductive device continues to flow through flyback diodes, gradually decreasing over time. Another pulse is provided by the time-base circuit before the current is allowed to reach zero. By controlling the duration and rate of increase and decrease of current through the inductive device, a method of current control for inductive elements has been provided.

摘要翻译： 本发明提供了一种通过电感元件的电流来控制电流的系统，该系统根据电感元件的当前要求，在脉冲宽度调制模式和线性模式之间自动切换。 时基电路提供允许电流流过感应器件的周期性脉冲。 通过电感器件的电流随时间增加。 如果通过电感器件的电流超过规定值，则电流将被切断，直到来自时基电路的下一个脉冲为止。 在电源电流关闭后，通过感应器件的电流继续流过回扫二极管，随着时间逐渐减小。 在允许电流达到零之前，时基电路提供另一脉冲。 通过控制通过感应装置的电流的增加和减少的持续时间和速率，已经提供了电感元件的电流控制方法。

公开(公告)号：US5319289A

公开(公告)日：1994-06-07

申请号：US840440

申请日：1992-02-24

申请人： Charles C. Austin ,  Bertram J. White

发明人： Charles C. Austin ,  Bertram J. White

IPC分类号： H02P6/16 ,  H02P6/14 ,  H02P6/02

CPC分类号： H02P6/15

摘要： A circuit to provide adaptive commutation delay for multi-pole brushless DC motors. The circuit adjusts the commutation delay as a function of the rotational speed of the motor to maximize motor torque and minimize power consumption. Unlike the prior art, the circuit avoids the need for complex circuitry or external components. The circuit may be implemented entirely within a single integrated circuit. The circuit includes a back-EMF sensing input, an oscillator, a voltage holding and proportioning circuit, one or more comparators and, optionally, an external control circuit. The back-EMF sensing input controls the operation of the oscillator. The voltage holding and proportioning circuit processes the oscillator output and provides outputs which are compared by the comparators. The comparators produce commutation delay signals and, optionally, other signals. The circuit also allows adjustment to compensate for non-ideal back-EMF-to-rotor-position correspondence or fixed time delays inherent in the commutation process.

摘要翻译： 为多极无刷直流电机提供自适应换向延迟的电路。 该电路根据电动机的转速调节换向延迟，以最大限度地提高电机转矩并最大限度地降低功耗。 与现有技术不同，该电路避免了对复杂电路或外部组件的需要。 该电路可以完全在单个集成电路内实现。 电路包括反电动势检测输入，振荡器，电压保持和配比电路，一个或多个比较器和可选的外部控制电路。 反电动势检测输入控制振荡器的工作。 电压保持和配比电路处理振荡器输出并提供由比较器比较的输出。 比较器产生换向延迟信号和可选的其它信号。 该电路还允许调整以补偿非理想的反电动势到转子位置对应或在换向过程中固有的固定时间延迟。