公开(公告)号：US20240324238A1

公开(公告)日：2024-09-26

申请号：US18589342

申请日：2024-02-27

Applicant: Kioxia Corporation

Inventor： Reika TANAKA ,  Kunifumi SUZUKI ,  Kiwamu SAKUMA ,  Yoko YOSHIMURA ,  Takamasa HAMAI ,  Kensuke OTA ,  Yusuke HIGASHI ,  Yoshiaki ASAO ,  Masamichi SUZUKI

IPC: H10B53/30

CPC classification number: H10B53/30

Abstract: A storage device includes a first electrode, a second electrode, a first dielectric layer between the first and second electrodes and including oxygen and at least one of hafnium and zirconium, a second dielectric layer between the first electrode and the first dielectric layer, and an intermediate region between the first and second dielectric layers and in which a plurality of metallic portions are provided.

公开(公告)号：US20240188253A1

公开(公告)日：2024-06-06

申请号：US18461563

申请日：2023-09-06

Applicant: Kioxia Corporation

Inventor： Tomoya SANUKI ,  Yasuhito YOSHIMIZU ,  Yusuke HIGASHI ,  Hideko MUKAIDA

IPC: H05K7/20

CPC classification number: H05K7/20372 ,  H05K7/20381

Abstract: A semiconductor device according to an embodiment includes: a chamber including an internal structure capable of holding a pressure in the chamber lower than atmospheric pressure; one or a plurality of cooling member provided inside of the internal structure of the chamber, the cooling member holding and cooling a semiconductor device; and a heat transfer part exchanging heat with a refrigerator cooling the cooling member.

公开(公告)号：US20230320093A1

公开(公告)日：2023-10-05

申请号：US17929454

申请日：2022-09-02

Applicant: Kioxia Corporation

Inventor： Harumi SEKI ,  Masamichi SUZUKI ,  Reika TANAKA ,  Kensuke OTA ,  Yusuke HIGASHI

IPC: H01L29/51 ,  H01L27/11582

CPC classification number: H01L27/11582 ,  H01L29/516

Abstract: A semiconductor memory device according to an embodiment includes a stacked body in which a gate electrode layer and a first insulating layer are alternately stacked in a first direction, a semiconductor layer in the stacked body and extending in the first direction, a second insulating layer between the semiconductor layer and the stacked body, a third insulating layer provided between the second insulating layer and the stacked body, and a first layer between the second insulating layer and the third insulating layer. The first layer contains silicon and nitrogen and includes a first region between the gate electrode layer and the semiconductor layer and a second region between the first insulating layer and the semiconductor layer, the first region contains or does not contain fluorine, the second region contains fluorine, and a fluorine concentration of the second region is higher than a fluorine concentration of the first region.