Shift register using oxide transistor and display device using the same

    公开(公告)号:US10157683B2

    公开(公告)日:2018-12-18

    申请号:US15140931

    申请日:2016-04-28

    Abstract: Disclosed is a shift register which prevents current leakage and degradation of an oxide transistor due to light to improve output stability, and a display device using the same. The shift register includes a plurality of stages, and each stage includes a transmission line unit including a plurality of clock lines to supply a plurality of clock signals and a plurality of power lines to supply a plurality of voltages, a transistor unit including a plurality of transistors, and a light-shielding layer overlapping at least one transistor of the transistor unit so as to block light.

    Organic light emitting diode display device and method of fabricating the same
    2.
    发明授权
    Organic light emitting diode display device and method of fabricating the same 有权
    有机发光二极管显示装置及其制造方法

    公开(公告)号:US09054061B1

    公开(公告)日:2015-06-09

    申请号:US14552834

    申请日:2014-11-25

    Abstract: An OLED display device includes a first oxide semiconductor layer including first to fourth regions; a first gate electrode on a first insulating layer and the first oxide semiconductor layer, and completely overlapping the first region; a first storage electrode extending from the first gate electrode and overlapping the second region; a second insulating layer covering the first gate electrode and the first storage electrode and exposing the third and fourth regions; first source and drain electrodes on the second insulating layer and contacting the third and fourth regions; and an emitting diode connected to the first drain electrode, wherein a portion of the second region at an edge of the first storage electrode except a center of the first storage electrode is conductive to form a second storage electrode, and the first and second storage electrodes and the first insulating layer constitute a first storage capacitor.

    Abstract translation: OLED显示装置包括:包括第一至第四区域的第一氧化物半导体层; 在第一绝缘层上的第一栅电极和第一氧化物半导体层,并且与第一区域完全重叠; 从所述第一栅电极延伸并且与所述第二区域重叠的第一存储电极; 覆盖所述第一栅极电极和所述第一存储电极并暴露所述第三和第四区域的第二绝缘层; 第二绝缘层上的第一源电极和漏电极,并与第三和第四区域接触; 以及连接到所述第一漏电极的发光二极管,其中除了所述第一存储电极的中心之外的所述第一存储电极的边缘处的所述第二区域的一部分是导电的,以形成第二存储电极,并且所述第一和第二存储电极 并且第一绝缘层构成第一存储电容器。

    Array substrate and method of fabricating the same
    3.
    发明授权
    Array substrate and method of fabricating the same 有权
    阵列基板及其制造方法

    公开(公告)号:US08716062B1

    公开(公告)日:2014-05-06

    申请号:US14146937

    申请日:2014-01-03

    Abstract: A method of fabricating an array substrate and a display device including the array substrate are discussed. According to an embodiment, the array substrate includes a gate electrode formed on a substrate; a gate insulating layer formed on the gate electrode; an oxide semiconductor layer and an etch prevention layer formed on the gate insulating layer, wherein ends of the oxide semiconductor layer and ends of the etch prevention layer are aligned with each other; source and drain electrodes formed on the etch prevention layer; a passivation layer including a contact hole formed on the source and drain electrodes and on the gate insulating layer; and a pixel electrode formed on the passivation layer and through the contact hole.

    Abstract translation: 讨论了制造阵列基板的方法和包括阵列基板的显示装置。 根据实施例,阵列基板包括形成在基板上的栅电极; 形成在所述栅电极上的栅极绝缘层; 形成在栅绝缘层上的氧化物半导体层和防蚀层,其中氧化物半导体层的端部和防蚀层的端部彼此对准; 源极和漏极形成在防蚀层上; 钝化层,包括形成在源电极和漏电极上以及栅极绝缘层上的接触孔; 以及形成在钝化层上并通过接触孔的像素电极。

    Array substrate and method of fabricating the same

    公开(公告)号:US08659017B2

    公开(公告)日:2014-02-25

    申请号:US13923019

    申请日:2013-06-20

    Abstract: A method of fabricating an array substrate and a display device including the array substrate are discussed. According to an embodiment, the array substrate includes a gate electrode formed on a substrate; a gate insulating layer formed on the gate electrode; an oxide semiconductor layer and an etch prevention layer formed on the gate insulating layer, wherein ends of the oxide semiconductor layer and ends of the etch prevention layer are aligned with each other; source and drain electrodes formed on the etch prevention layer; a passivation layer including a contact hole formed on the source and drain electrodes and on the gate insulating layer; and a pixel electrode formed on the passivation layer and through the contact hole.

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