Abstract:
Embodiments described herein provide method for forming crystalline indium-gallium-zinc oxide (IGZO) with intra-layer variations and methods for forming such IGZO. At least a portion of a substrate is positioned in a processing chamber. A first sub-layer of an IGZO layer is formed above the at least a portion of the substrate while the at least a portion of the substrate is in the processing chamber. The first sub-layer of the IGZO layer is formed using a first set of processing conditions. A second sub-layer of the IGZO layer is formed above the first sub-layer of the IGZO layer while the at least a portion of the substrate is in the processing chamber. The second sub-layer of the IGZO layer is formed using a second set of processing conditions. The second set of processing conditions is different than the first set of processing conditions.
Abstract:
A display device includes a gate electrode on a substrate of a semiconductor device, a gate insulating film over the gate electrode, an active layer comprising an oxide including indium, zinc and gallium on the gate insulating film, and overlapping the gate electrode, and a source electrode and a drain electrode that are spaced apart from each other, wherein the active layer is formed from a zinc-rich target material, and an atomic % ratio of indium, zinc and gallium in the active layer is different from an atomic % ratio of the zinc-rich target material.
Abstract:
An oxide semiconductor crystallization method may include depositing an In—Ga—Zn oxide over the substrate while heating a substrate to a temperature of 200 to 300° C., and heat-treating the deposited In—Ga—Zn oxide at a temperature of 200 to 350° C., thereby forming an oxide semiconductor layer crystallized throughout an entire thickness thereof.
Abstract:
A method for manufacturing a thin film transistor (TFT) array substrate having enhanced reliability is disclosed. The method includes forming a multilayer structure including at least one first metal layer and a second metal layer made of copper, forming a first mask layer including a first mask area corresponding to a data line and a second mask area corresponding to an electrode pattern to overlap with an active layer, patterning the multilayer structure, thereby forming the data line constituted by the multilayer structure, patterning the second metal layer, thereby forming the electrode pattern constituted by the at least one first metal layer, forming a second mask layer to expose a portion of the electrode pattern corresponding to a channel area of the active layer, patterning the at least one first metal layer, thereby forming source and drain.
Abstract:
A method for manufacturing a semiconductor device is discussed. The method includes forming a gate electrode on a substrate, forming a gate insulating film over the substrate, depositing an In—Ga—Zn oxide over the gate insulating film while heating the substrate to a temperature of 200 to 300° C., an atomic percent ratio of Zn in the In—Ga—Zn oxide as-deposited being higher than that of In or Ga, heat-treating the deposited In—Ga—Zn oxide at a temperature of 200 to 350° C., thereby forming an active layer crystallized throughout an entire thickness of the active layer, and forming a source electrode and a drain electrode.
Abstract:
Embodiments described herein provide method for forming crystalline indium-gallium-zinc oxide (IGZO). A substrate is provided. A seed layer is formed above the substrate. The seed layer has a crystalline structure that is substantially dominant along the c-axis. An IGZO layer is formed above the seed layer. The seed layer may include zinc oxide. A stack of alternating seed layers and IGZO layers may be formed.
Abstract:
Embodiments described herein provide method for forming crystalline indium-gallium-zinc oxide (IGZO). A substrate is provided. A layer is formed above the substrate using a PVD process. The layer includes indium, gallium, zinc, or a combination thereof. The PVD process is performed in a gaseous environment having a pressure of between about 1 mT and about 5 mT and including between about 20% and about 100% oxygen gas. The PVD process may be performed at a processing temperature between about 25° C. and about 400° C. The duty cycle of the PVD process may be between about 70% and about 100%.
Abstract:
Embodiments described herein provide method for forming crystalline indium-gallium-zinc oxide (IGZO). A substrate is positioned relative to at least one target. The at least one target includes indium, gallium, zinc, or a combination thereof. A substantially constant voltage is provided across the substrate and the at least one target to cause a plasma species to impact the at least one target. The impacting of the plasma species on the at least one target causes material to be ejected from the at least one target to form an IGZO layer above the substrate.
Abstract:
Embodiments described herein provide method for forming crystalline indium-gallium-zinc oxide (IGZO). A substrate is provided. A seed layer is formed above the substrate. The seed layer has a crystalline structure that is substantially dominant along the c-axis. An IGZO layer is formed above the seed layer. The seed layer may include zinc oxide. A stack of alternating seed layers and IGZO layers may be formed.
Abstract:
Disclosed herein is an organic light emitting diode (OLED) display device capable of improving image sticking improvement capability by expanding an image shift orbit or changing the shape of an image shift orbit using a maximum shift range. An image processor of an OLED display device independently determines a pixel shift amount in a horizontal direction and a pixel shift amount in a vertical direction in consideration of a maximum shift range in each of the horizontal and vertical directions, simultaneously applies the determined pixel shift amounts in the horizontal and vertical directions to shift a source image, and outputs the shifted image.