公开(公告)号：US20230204537A1

公开(公告)日：2023-06-29

申请号：US18056194

申请日：2022-11-16

Applicant: LIFE TECHNOLOGIES CORPORATION

Inventor： Keith G. Fife ,  Jungwook Yang

IPC: G01N27/414 ,  G06F30/392 ,  G06F30/394

CPC classification number: G01N27/4145 ,  G06F30/392 ,  G06F30/394 ,  G01N27/4148

Abstract: A high data rate integrated circuit, such as an integrated circuit including a large sensor array, may be implemented using clock multipliers in individual power domains, coupled to sets of transmitters, including a transmitter pair configuration. Reference clock distribution circuitry on the integrated circuit distributes a relatively low speed reference clock. In a transmitter pair configuration, each pair comprises a first transmitter and a second transmitter in a transmitter power domain. Also, each pair of transmitters includes a clock multiplier connected to the reference clock distribution circuitry, and disposed between the first and second transmitters, which produces a local transmit clock.

公开(公告)号：US09110015B2

公开(公告)日：2015-08-18

申请号：US14569289

申请日：2014-12-12

Applicant: LIFE TECHNOLOGIES CORPORATION

Inventor： Keith G. Fife ,  Jungwook Yang

IPC: G01N15/06 ,  G01N27/414 ,  H03K5/003

CPC classification number: G01N27/4148 ,  H03K5/003 ,  Y10S436/806 ,  Y10S436/807 ,  Y10T436/11

Abstract: An array of sensors arranged in matched pairs of transistors with an output formed on a first transistor and a sensor formed on the second transistor of the matched pair. The matched pairs are arranged such that the second transistor in the matched pair is read through the output of the first transistor in the matched pair. The first transistor in the matched pair is forced into the saturation (active) region to prevent interference from the second transistor on the output of the first transistor. A sample is taken of the output. The first transistor is then placed into the linear region allowing the sensor formed on the second transistor to be read through the output of the first transistor. A sample is taken from the output of the sensor reading of the second transistor. A difference is formed of the two samples.

Abstract translation: 布置成匹配的晶体管对的传感器阵列，其具有形成在第一晶体管上的输出和形成在匹配对的第二晶体管上的传感器。 匹配对被布置成使得匹配对中的第二晶体管通过匹配对中的第一晶体管的输出读取。 匹配对中的第一晶体管被迫进入饱和（有源）区域，以防止第一晶体管的输出上的第二晶体管的干扰。 取出输出的样本。 然后将第一晶体管放置在线性区域中，允许通过第一晶体管的输出读取形成在第二晶体管上的传感器。 样品从第二晶体管的传感器读数的输出中取出。 两个样本形成差异。

公开(公告)号：US20150097610A1

公开(公告)日：2015-04-09

申请号：US14569289

申请日：2014-12-12

Applicant: LIFE TECHNOLOGIES CORPORATION

Inventor： Keith G. FIFE ,  Jungwook Yang

IPC: G01N27/414 ,  H03K5/003

CPC classification number: G01N27/4148 ,  H03K5/003 ,  Y10S436/806 ,  Y10S436/807 ,  Y10T436/11

Abstract: An array of sensors arranged in matched pairs of transistors with an output formed on a first transistor and a sensor formed on the second transistor of the matched pair. The matched pairs are arranged such that the second transistor in the matched pair is read through the output of the first transistor in the matched pair. The first transistor in the matched pair is forced into the saturation (active) region to prevent interference from the second transistor on the output of the first transistor. A sample is taken of the output. The first transistor is then placed into the linear region allowing the sensor formed on the second transistor to be read through the output of the first transistor. A sample is taken from the output of the sensor reading of the second transistor. A difference is formed of the two samples.

Abstract translation: 布置成匹配的晶体管对的传感器阵列，其具有形成在第一晶体管上的输出和形成在匹配对的第二晶体管上的传感器。 匹配对被布置成使得匹配对中的第二晶体管通过匹配对中的第一晶体管的输出读取。 匹配对中的第一晶体管被迫进入饱和（有源）区域，以防止第一晶体管的输出上的第二晶体管的干扰。 取出输出的样本。 然后将第一晶体管放置在线性区域中，允许通过第一晶体管的输出读取形成在第二晶体管上的传感器。 样品从第二晶体管的传感器读数的输出中取出。 两个样本形成差异。

公开(公告)号：US20140368250A1

公开(公告)日：2014-12-18

申请号：US14334291

申请日：2014-07-17

Applicant: LIFE TECHNOLOGIES CORPORATION

Inventor： Keith G. Fife ,  Jungwook Yang

IPC: H03K5/003

CPC classification number: G01N27/4148 ,  H03K5/003 ,  Y10S436/806 ,  Y10S436/807 ,  Y10T436/11

Abstract: An array of sensors arranged in matched pairs of transistors with an output formed on a first transistor and a sensor formed on the second transistor of the matched pair. The matched pairs are arranged such that the second transistor in the matched pair is read through the output of the first transistor in the matched pair. The first transistor in the matched pair is forced into the saturation (active) region to prevent interference from the second transistor on the output of the first transistor. A sample is taken of the output. The first transistor is then placed into the linear region allowing the sensor formed on the second transistor to be read through the output of the first transistor. A sample is taken from the output of the sensor reading of the second transistor. A difference is formed of the two samples.

Abstract translation: 布置成匹配的晶体管对的传感器阵列，其具有形成在第一晶体管上的输出和形成在匹配对的第二晶体管上的传感器。 匹配对被布置成使得匹配对中的第二晶体管通过匹配对中的第一晶体管的输出读取。 匹配对中的第一晶体管被迫进入饱和（有源）区域，以防止第一晶体管的输出上的第二晶体管的干扰。 取出输出的样本。 然后将第一晶体管放置在线性区域中，允许通过第一晶体管的输出读取形成在第二晶体管上的传感器。 样品从第二晶体管的传感器读数的输出中取出。 两个样本形成差异。

公开(公告)号：US20200284754A1

公开(公告)日：2020-09-10

申请号：US16808276

申请日：2020-03-03

Applicant: LIFE TECHNOLOGIES CORPORATION

Inventor： Keith G. Fife ,  Jungwook Yang

IPC: G01N27/414 ,  G06F30/392 ,  G06F30/394

Abstract: A high data rate integrated circuit, such as an integrated circuit including a large sensor array, may be implemented using clock multipliers in individual power domains, coupled to sets of transmitters, including a transmitter pair configuration. Reference clock distribution circuitry on the integrated circuit distributes a relatively low speed reference clock. In a transmitter pair configuration, each pair comprises a first transmitter and a second transmitter in a transmitter power domain. Also, each pair of transmitters includes a clock multiplier connected to the reference clock distribution circuitry, and disposed between the first and second transmitters, which produces a local transmit clock.

公开(公告)号：US10767224B2

公开(公告)日：2020-09-08

申请号：US16110341

申请日：2018-08-23

Applicant: LIFE TECHNOLOGIES CORPORATION

Inventor： Keith G. Fife ,  Jungwook Yang

IPC: C12Q1/6874 ,  G01N27/414 ,  G01N35/00

Abstract: A sensor device includes a sensor array and a flow cell in fluid communication with the sensor array. Bias circuitry apply bias arrangements to the sensor array to produce sensor data. Peripheral circuitry coupled to the bias circuitry produces streams of data from the sensor array, the peripheral circuitry having an active mode and an idle mode. Logic to switch the peripheral circuitry between the active mode and the idle mode to control power consumption is provided. A temperature sensor may be included, and the logic can operate with feedback to switch between the active mode and the idle mode to maintain the temperature within an operating range.

公开(公告)号：US20190136315A1

公开(公告)日：2019-05-09

申请号：US16110341

申请日：2018-08-23

Applicant: LIFE TECHNOLOGIES CORPORATION

Inventor： Keith G. Fife ,  Jungwook Yang

IPC: C12Q1/6874 ,  G01N35/00 ,  G01N27/414

CPC classification number: C12Q1/6874 ,  G01N27/4145 ,  G01N27/4148 ,  G01N35/00712 ,  G01N35/00871 ,  G01N2035/00881

Abstract: A sensor device includes a sensor array and a flow cell in fluid communication with the sensor array. Bias circuitry apply bias arrangements to the sensor array to produce sensor data. Peripheral circuitry coupled to the bias circuitry produces streams of data from the sensor array, the peripheral circuitry having an active mode and an idle mode. Logic to switch the peripheral circuitry between the active mode and the idle mode to control power consumption is provided. A temperature sensor may be included, and the logic can operate with feedback to switch between the active mode and the idle mode to maintain the temperature within an operating range.

公开(公告)号：US10077472B2

公开(公告)日：2018-09-18

申请号：US14965568

申请日：2015-12-10

Applicant: LIFE TECHNOLOGIES CORPORATION

Inventor： Keith G. Fife ,  Jungwook Yang

IPC: G01N30/02 ,  G01N31/12 ,  B01J19/00 ,  C12Q1/6874 ,  G01N27/414 ,  G01N35/00

CPC classification number: C12Q1/6874 ,  G01N27/4145 ,  G01N27/4148 ,  G01N35/00712 ,  G01N35/00871 ,  G01N2035/00881

Abstract: A sensor device includes a sensor array and a flow cell in fluid communication with the sensor array. Bias circuitry apply bias arrangements to the sensor array to produce sensor data. Peripheral circuitry coupled to the bias circuitry produces streams of data from the sensor array, the peripheral circuitry having an active mode and an idle mode. Logic to switch the peripheral circuitry between the active mode and the idle mode to control power consumption is provided. A temperature sensor may be included, and the logic can operate with feedback to switch between the active mode and the idle mode to maintain the temperature within an operating range.

公开(公告)号：US12196704B2

公开(公告)日：2025-01-14

申请号：US18056194

申请日：2022-11-16

Applicant: LIFE TECHNOLOGIES CORPORATION

Inventor： Keith G. Fife ,  Jungwook Yang

IPC: G01N27/414 ,  G06F30/392 ,  G06F30/394

Abstract: A high data rate integrated circuit, such as an integrated circuit including a large sensor array, may be implemented using clock multipliers in individual power domains, coupled to sets of transmitters, including a transmitter pair configuration. Reference clock distribution circuitry on the integrated circuit distributes a relatively low speed reference clock. In a transmitter pair configuration, each pair comprises a first transmitter and a second transmitter in a transmitter power domain. Also, each pair of transmitters includes a clock multiplier connected to the reference clock distribution circuitry, and disposed between the first and second transmitters, which produces a local transmit clock.

公开(公告)号：US08912005B1

公开(公告)日：2014-12-16

申请号：US14334291

申请日：2014-07-17

Applicant: Life Technologies Corporation

Inventor： Keith G. Fife ,  Jungwook Yang

IPC: G01N15/06 ,  H03K5/003

CPC classification number: G01N27/4148 ,  H03K5/003 ,  Y10S436/806 ,  Y10S436/807 ,  Y10T436/11

Abstract: An array of sensors arranged in matched pairs of transistors with an output formed on a first transistor and a sensor formed on the second transistor of the matched pair. The matched pairs are arranged such that the second transistor in the matched pair is read through the output of the first transistor in the matched pair. The first transistor in the matched pair is forced into the saturation (active) region to prevent interference from the second transistor on the output of the first transistor. A sample is taken of the output. The first transistor is then placed into the linear region allowing the sensor formed on the second transistor to be read through the output of the first transistor. A sample is taken from the output of the sensor reading of the second transistor. A difference is formed of the two samples.

Abstract translation: 布置成匹配的晶体管对的传感器阵列，其具有形成在第一晶体管上的输出和形成在匹配对的第二晶体管上的传感器。 匹配对被布置成使得匹配对中的第二晶体管通过匹配对中的第一晶体管的输出读取。 匹配对中的第一晶体管被迫进入饱和（有源）区域，以防止第一晶体管的输出上的第二晶体管的干扰。 取出输出的样本。 然后将第一晶体管放置在线性区域中，允许通过第一晶体管的输出读取形成在第二晶体管上的传感器。 样品从第二晶体管的传感器读数的输出中取出。 两个样本形成差异。