摘要:
An analog and digital auto-gain control method includes the steps of: providing a gain-mapping table; determining an analog gain level according to a power of a far-end transmitted signal; obtaining a gain-mapping value from the gain-mapping table according to the analog gain level; obtaining a digital gain value according to the gain-mapping value; and adjusting a gain of a digital signal according to the digital gain value. A receiver that performs the auto-gain control method is also disclosed.
摘要:
An apparatus for channel interference cancellation includes a first interference-cancellation module and a first cancellation-signal generating circuit. The first interference-cancellation module comprises a first processing circuit including a grouping circuit and a first transforming circuit. The grouping circuit divides received data into a plurality of groups of first sub-data. The first transforming circuit sequentially transforms the groups of first sub-data from a first domain to a second domain to generate a plurality of groups of first transformed sub-data. The first cancellation-signal generating circuit comprises a delay unit, a first processing unit and a second processing unit. The delay unit sequentially delays the groups of first transformed sub-data to generate a plurality of groups of delayed sub-data. The first and the second processing unit output a first and a second processed signal according to the groups of first transformed sub-data and the groups of delayed sub-data respectively.
摘要:
A network apparatus for eliminating interference between transport ports includes a plurality of transport ports and at least one alien NEXT canceller. The alien NEXT canceller is coupled to a designated transport port of the plurality of transport ports for eliminating NEXT interference from other transport ports of the plurality of transport ports. The alien NEXT canceller operates in a time domain or a frequency domain. In one exemplary embodiment, the network apparatus is a switch.
摘要:
A network apparatus with a plurality of transport ports and a shared coefficient update processor is proposed. Each of the plurality of transport ports includes a PHY module. The coefficient update processor is coupled to each PHY module and is shared by the plurality of transport ports. The coefficient update processor decides coefficients of each PHY module. The coefficient update processor is dedicated to one of the plurality of transport ports for use in a period of time.
摘要:
An apparatus for channel interference cancellation includes a first interference-cancellation module and a first cancellation-signal generating circuit. The first interference-cancellation module comprises a first processing circuit including a grouping circuit and a first transforming circuit. The grouping circuit divides received data into a plurality of groups of first sub-data. The first transforming circuit sequentially transforms the groups of first sub-data from a first domain to a second domain to generate a plurality of groups of first transformed sub-data. The first cancellation-signal generating circuit comprises a delay unit, a first processing unit and a second processing unit. The delay unit sequentially delays the groups of first transformed sub-data to generate a plurality of groups of delayed sub-data. The first and the second processing unit output a first and a second processed signal according to the groups of first transformed sub-data and the groups of delayed sub-data respectively.
摘要:
A network signal processing circuit includes a first signal processing module, a first sampling rate converter, a second signal processing module, a second sampling rate converter and a timing controller. The first signal processing module is utilized for processing a network signal to output a first processed signal. The first sampling rate converter is utilized for performing signal frequency conversion on the first processed signal according to a first clock timing adjusting signal and outputting a first converted signal. The second signal processing module is utilized for processing the first converted signal to output a second processed signal. The second sampling rate converter is utilized for performing signal frequency conversion on the second processed signal according to a second clock timing adjusting signal and outputting a second converted signal. The timing controller is utilized for generating the first and second clock timing adjusting signals.
摘要:
An analog and digital auto-gain control method includes the steps of: providing a gain-mapping table; determining an analog gain level according to power of a far-end transmitted signal; obtaining a gain-mapping value from the gain-mapping table according to the analog gain level; obtaining a digital gain value according to the gain-mapping value; and adjusting a gain of a digital signal according to the digital gain value. A receiver that performs the auto-gain control method is also disclosed.
摘要:
A network apparatus, for processing a network signal and outputting an output signal, includes an asynchronous signal processing module, a sampling rate converter and a synchronous signal processing module. The asynchronous signal processing module operates in an asynchronous domain, and is utilized for receiving and processing the network signal to generate a first processed signal. The sampling rate converter is coupled to the asynchronous signal processing module, and is utilized for performing sampling rate conversion on the first processed signal to generate the output signal. A first operating frequency of the asynchronous signal processing module is different from a second operating frequency of the synchronous signal processing module.
摘要:
The present invention provides a signal processing device. The signal processing device includes a first feed forward equalizing unit, a first data slicing unit, a second feed forward equalizing unit, and a second data slicing unit. The first feed forward equalizing unit is utilized for performing a compensation operation according to a digital input signal so as to generate a first equalized signal. The first data slicing unit is coupled to the first feed forward equalizing unit, and utilized for generating a first output signal according to the first equalized signal. The second feed forward equalizing unit is coupled to the first data slicing unit, and utilized for generating a second equalized signal according to the first equalized signal. The second data slicing unit is coupled to the second feed forward equalizing unit, and utilized for generating a second output signal according to the second equalized signal.
摘要:
A digital slicing device is provided for making a numerical value determination with respect to an inputted modulated symbol so as to output a corresponding symbol. The digital slicing device includes a demodulating unit, a slicing unit and a re-modulating unit. The demodulating unit is for collecting at least two successive modulated symbols and for demodulating the two modulated symbols according to a modulation algorithm so as to generate two demodulated symbols. The slicing unit is for rounding the two demodulated symbols so as to generate two rounded demodulated symbols. The re-modulating unit is for re-modulating the two rounded demodulated symbols according to the modulation algorithm so as to generate two re-modulated symbols corresponding to the two modulated symbols. The two modulated symbols are generated simultaneously through conversion using the modulation algorithm.