Apparatus and method for cross clock domain interference cancellation
    2.
    发明授权
    Apparatus and method for cross clock domain interference cancellation 有权
    用于跨时钟域干扰消除的装置和方法

    公开(公告)号:US08867650B2

    公开(公告)日:2014-10-21

    申请号:US13396589

    申请日:2012-02-14

    IPC分类号: H04B15/00

    摘要: An apparatus and method for cross clock domain interference cancellation is provided to a communication system which includes a transmitter operated in a first clock domain and a receiver operated in a second clock domain. The apparatus comprises a First-In-First-Out (FIFO) circuit and a cancellation signal generator. The FIFO circuit receives a digital transmission signal of the transmitter in the first clock domain, and outputs the digital transmission signal in the second clock domain according to an accumulated timing difference between the first and second clock domains. The cancellation signal generator generates a cancellation signal for canceling an interference signal received by the receiver according to the digital transmission signal outputted by the FIFO circuit. The interference signal is generated in response to the digital transmission signal. The cancellation signal generator adjusts the cancellation signal according to a phase difference between the interference signal and the cancellation signal.

    摘要翻译: 一种用于交叉时钟域干扰消除的装置和方法被提供给包括在第一时钟域中操作的发射机和在第二时钟域中操作的接收机的通信系统。 该装置包括先进先出(FIFO)电路和消除信号发生器。 FIFO电路在第一时钟域中接收发射机的数字传输信号,并根据第一和第二时钟域之间的累积时序差输出第二时钟域中的数字传输信号。 消除信号发生器根据由FIFO电路输出的数字传输信号产生消除由接收机接收的干扰信号的消除信号。 响应于数字传输信号产生干扰信号。 消除信号发生器根据干扰信号和消除信号之间的相位差来调整抵消信号。

    APPARATUS AND METHOD FOR CROSS CLOCK DOMAIN INTERFERENCE CANCELLATION
    4.
    发明申请
    APPARATUS AND METHOD FOR CROSS CLOCK DOMAIN INTERFERENCE CANCELLATION 有权
    用于跨时间域干扰消除的装置和方法

    公开(公告)号:US20120213306A1

    公开(公告)日:2012-08-23

    申请号:US13396589

    申请日:2012-02-14

    IPC分类号: H04B15/00

    摘要: An apparatus and method for cross clock domain interference cancellation is provided to a communication system which includes a transmitter operated in a first clock domain and a receiver operated in a second clock domain. The apparatus comprises a First-In-First-Out (FIFO) circuit and a cancellation signal generator. The FIFO circuit receives a digital transmission signal of the transmitter in the first clock domain, and outputs the digital transmission signal in the second clock domain according to an accumulated timing difference between the first and second clock domains. The cancellation signal generator generates a cancellation signal for canceling an interference signal received by the receiver according to the digital transmission signal outputted by the FIFO circuit. The interference signal is generated in response to the digital transmission signal. The cancellation signal generator adjusts the cancellation signal according to a phase difference between the interference signal and the cancellation signal.

    摘要翻译: 一种用于交叉时钟域干扰消除的装置和方法被提供给包括在第一时钟域中操作的发射机和在第二时钟域中操作的接收机的通信系统。 该装置包括先进先出(FIFO)电路和消除信号发生器。 FIFO电路在第一时钟域中接收发射机的数字传输信号,并根据第一和第二时钟域之间的累积时序差输出第二时钟域中的数字传输信号。 消除信号发生器根据由FIFO电路输出的数字传输信号产生消除由接收机接收的干扰信号的消除信号。 响应于数字传输信号产生干扰信号。 消除信号发生器根据干扰信号和消除信号之间的相位差来调整抵消信号。

    NETWORK DEVICE AND NETWORK CONNECTING METHOD FOR BUILDING UP NETWORK CONNECTION VIA HIGH DEFINITION MULTIMEDIA INTERFACE
    5.
    发明申请
    NETWORK DEVICE AND NETWORK CONNECTING METHOD FOR BUILDING UP NETWORK CONNECTION VIA HIGH DEFINITION MULTIMEDIA INTERFACE 有权
    网络设备和通过高级定义多媒体接口建立网络连接的网络连接方法

    公开(公告)号:US20120137162A1

    公开(公告)日:2012-05-31

    申请号:US13304691

    申请日:2011-11-28

    IPC分类号: G06F11/07

    摘要: A network device for building up a network connection via a high-definition multimedia interface, includes a scrambler, a descrambler, a comparator and a control unit. The scrambler is utilized for generating a transmission signal according to a first seed. The descrambler is for decoding a receiving signal to generate a second seed. The comparator is for generating a comparing result according to the first seed and the second seed. The control unit is for controlling the network connection according to the comparing result.

    摘要翻译: 一种用于通过高清多媒体接口建立网络连接的网络设备,包括加扰器,解扰器,比较器和控制单元。 加扰器用于根据第一种子产生传输信号。 解扰器用于解码接收信号以产生第二种子。 比较器用于根据第一种子和第二种子生成比较结果。 控制单元根据比较结果控制网络连接。

    Communication System and Method for Cancelling Timing dependence of Signals
    7.
    发明申请
    Communication System and Method for Cancelling Timing dependence of Signals 有权
    通信系统和取消信号时序依赖性的方法

    公开(公告)号:US20120134406A1

    公开(公告)日:2012-05-31

    申请号:US13304384

    申请日:2011-11-24

    IPC分类号: H04L25/49 H04L27/01 H04L25/08

    CPC分类号: H04B3/23 H04B3/235

    摘要: In a communication system, a timing-dependence cancelling module is included for cancelling timing-dependence of a transmission signal, so as to render a timing-dependent signal be capable of being utilized on communication systems. Besides, updating an echo cancelling parameter by applying an error difference variable and a data difference variable, or by directly decreasing a step-size coefficient, may also fulfill the purpose of reducing or eliminating timing dependence in a transmission signal of a communication system.

    摘要翻译: 在通信系统中,包括用于消除发送信号的定时依赖性的定时相关性取消模块,以使得能够在通信系统上利用与时序相关的信号。 此外,通过应用差错变量和数据差异变量,或通过直接减小步长系数来更新回波消除参数,也可以达到减少或消除通信系统的发送信号中的定时依赖性的目的。

    NETWORK DEVICE AND NETWORK CONNECTING METHOD
    8.
    发明申请
    NETWORK DEVICE AND NETWORK CONNECTING METHOD 有权
    网络设备和网络连接方法

    公开(公告)号:US20120134372A1

    公开(公告)日:2012-05-31

    申请号:US13305747

    申请日:2011-11-29

    IPC分类号: H04L12/66

    摘要: A network device includes a first transceiver unit, a second transceiver unit and a control unit. The first transceiver unit is utilized for processing a data corresponding to a first physical (PHY) layer via a first interface. The second transceiver unit is utilized for processing a data corresponding to a second PHY layer via a second interface. The control unit is utilized for processing a data corresponding to a media access control (MAC) layer, wherein the control unit connects with at least one of the first transceiver unit and the second transceiver unit with reference to a connection scheme.

    摘要翻译: 网络设备包括第一收发器单元,第二收发器单元和控制单元。 第一收发器单元用于经由第一接口处理对应于第一物理(PHY)层的数据。 第二收发器单元用于经由第二接口处理对应于第二PHY层的数据。 控制单元用于处理对应于媒体访问控制(MAC)层的数据,其中控制单元参考连接方案与第一收发器单元和第二收发器单元中的至少一个相连。

    Transceiver with adjustable sampling values and signal transceiving method thereof
    9.
    发明授权
    Transceiver with adjustable sampling values and signal transceiving method thereof 有权
    收发器具有可调取样值及其信号收发方法

    公开(公告)号:US08165188B2

    公开(公告)日:2012-04-24

    申请号:US12346897

    申请日:2008-12-31

    IPC分类号: H04L5/16

    摘要: A transceiver includes: a first DAC, for receiving a first digital signal to generate an analog signal; an operation circuit, coupled to the first DAC, for receiving the analog signal and a feedback signal to generate an operated analog signal; an ADC, for generating a second digital signal according to the operated analog signal; a digital signal processing circuit, for processing the second digital signal to generate a processed digital signal; a second DAC, for generating the feedback signal according to the processed digital signal; an adjustable delay circuit, for delaying a clock signal according to a control signal to adjust at least one sampling point of at least one of the first DAC, the second DAC and the ADC; and a control circuit, for generating the control signal according to the processed digital signal.

    摘要翻译: 收发器包括:第一DAC,用于接收第一数字信号以产生模拟信号; 耦合到第一DAC的操作电路,用于接收模拟信号和反馈信号以产生操作的模拟信号; ADC,用于根据所操作的模拟信号产生第二数字信号; 数字信号处理电路,用于处理第二数字信号以产生经处理的数字信号; 第二DAC,用于根据所处理的数字信号产生反馈信号; 可调延迟电路,用于根据控制信号延迟时钟信号以调整第一DAC,第二DAC和ADC中的至少一个的至少一个采样点; 以及控制电路,用于根据处理的数字信号产生控制信号。

    Network apparatus with shared coefficient update processor and method thereof
    10.
    发明授权
    Network apparatus with shared coefficient update processor and method thereof 有权
    具有共享系数更新处理器的网络设备及其方法

    公开(公告)号:US07898992B2

    公开(公告)日:2011-03-01

    申请号:US12260101

    申请日:2008-10-29

    IPC分类号: H04B3/20 H04B1/38 H04L12/66

    CPC分类号: H04B3/32 H04B3/23 H04L49/10

    摘要: A network apparatus with a plurality of transport ports and a shared coefficient update processor is proposed. Each of the plurality of transport ports includes a PHY module. The coefficient update processor is coupled to each PHY module and is shared by the plurality of transport ports. The coefficient update processor decides coefficients of each PHY module. The coefficient update processor is dedicated to one of the plurality of transport ports for use in a period of time.

    摘要翻译: 提出了具有多个传输端口和共享系数更新处理器的网络设备。 多个传输端口中的每一个包括PHY模块。 系数更新处理器耦合到每个PHY模块并由多个传输端口共享。 系数更新处理器决定每个PHY模块的系数。 系数更新处理器专用于多个传输端口中的一个,用于一段时间。