公开(公告)号：US20060097749A1

公开(公告)日：2006-05-11

申请号：US10982485

申请日：2004-11-05

申请人： Sagheer Ahmad ,  Lin Chen ,  Sam Huynh ,  Shu-Shia Chow ,  Joe Macri

发明人： Sagheer Ahmad ,  Lin Chen ,  Sam Huynh ,  Shu-Shia Chow ,  Joe Macri

IPC分类号： H03K17/16

CPC分类号： H03K19/0005

摘要： An impedance compensation circuit generates per-group pull-up impedance information and per-group pull-down impedance information to calibrate a plurality of input/output pads and dynamically updates impedance information on a per channel basis. A group refers to a group of I/O pads having similar output drive strengths in a channel. A channel refers to all I/O pads, which collectively provide a bus interface to an external device. For example, all the I/O pads interfacing with a memory module may be grouped into a channel, and address I/O pads in a channel may be arranged into a “group.” Memory I/O pads may be grouped together into a channel since memory interface pads have input/output characteristics that may be different from those of other types of I/O pads in the chip. According to one embodiment, per-group programmable offset information provides calibration information that may be different for each group in each channel.

摘要翻译： 阻抗补偿电路产生每组上拉阻抗信息和每组下拉阻抗信息以校准多个输入/输出焊盘，并基于每个通道动态地更新阻抗信息。 组是指在通道中具有相似输出驱动强度的一组I / O焊盘。 一个通道是指所有的I / O焊盘，它们共同地为外部设备提供总线接口。 例如，与存储器模块接口的所有I / O焊盘可以分组成通道，并且通道中的地址I / O焊盘可以被布置成“组”。 存储器I / O焊盘可以被组合在一起成为通道，因为存储器接口焊盘具有与芯片中的其它类型的I / O焊盘的输入/输出特性不同的输入/输出特性。 根据一个实施例，每组可编程偏移信息提供对于每个通道中的每个组可以不同的校准信息。

公开(公告)号：US07227376B2

公开(公告)日：2007-06-05

申请号：US10982485

申请日：2004-11-05

申请人： Sagheer Ahmad ,  Lin Chen ,  Sam Huynh ,  Shu-Shia Chow ,  Joe Macri

发明人： Sagheer Ahmad ,  Lin Chen ,  Sam Huynh ,  Shu-Shia Chow ,  Joe Macri

IPC分类号： H03K17/16 ,  H03K19/003

CPC分类号： H03K19/0005

摘要： An impedance compensation circuit generates per-group pull-up impedance information and per-group pull-down impedance information to calibrate a plurality of input/output pads and dynamically updates impedance information on a per channel basis. A group refers to a group of I/O pads having similar output drive strengths in a channel. A channel refers to all I/O pads, which collectively provide a bus interface to an external device. For example, all the I/O pads interfacing with a memory module may be grouped into a channel, and address I/O pads in a channel may be arranged into a “group.” Memory I/O pads may be grouped together into a channel since memory interface pads have input/output characteristics that may be different from those of other types of I/O pads in the chip. According to one embodiment, per-group programmable offset information provides calibration information that may be different for each group in each channel.

摘要翻译： 阻抗补偿电路产生每组上拉阻抗信息和每组下拉阻抗信息以校准多个输入/输出焊盘，并基于每个通道动态地更新阻抗信息。 组是指在通道中具有相似输出驱动强度的一组I / O焊盘。 一个通道是指所有的I / O焊盘，它们共同地为外部设备提供总线接口。 例如，与存储器模块接口的所有I / O焊盘可以分组成通道，并且通道中的地址I / O焊盘可以被布置成“组”。 存储器I / O焊盘可以被组合在一起成为通道，因为存储器接口焊盘具有与芯片中的其它类型的I / O焊盘的输入/输出特性不同的输入/输出特性。 根据一个实施例，每组可编程偏移信息提供对于每个通道中的每个组可以不同的校准信息。

公开(公告)号：US20060115016A1

公开(公告)日：2006-06-01

申请号：US10987747

申请日：2004-11-12

申请人： Lin Chen ,  Sam Huynh ,  Joe Macri

发明人： Lin Chen ,  Sam Huynh ,  Joe Macri

IPC分类号： H04L27/20

CPC分类号： G11C7/1078 ,  G11C7/1051 ,  G11C7/1057 ,  G11C7/1066 ,  G11C7/1084 ,  G11C2207/2254

摘要： Methods and apparatus for transmitting and receiving data in a memory interface are disclosed. The apparatus include a programmable transceiver having a variable duty cycle control, with the transceiver having at least one of a programmable variable duty cycle receiver and a programmable variable duty cycle transmitter. The receiver and the transmitter are both responsive to variable duty cycle control data and operate to vary a duty cycle of one of incoming and outgoing data. By providing programmability to the data duty cycle, the transceiver can optimally accommodate different memory device standards.

摘要翻译： 公开了在存储器接口中发送和接收数据的方法和装置。 该装置包括具有可变占空比控制的可编程收发器，该收发器具有可编程可变占空比接收器和可编程可变占空比发射器中的至少一个。 接收器和发射器都响应于可变占空比控制数据，并且操作以改变输入和输出数据之一的占空比。 通过提供数据占空比的可编程性，收发器可以最佳地适应不同的存储器设备标准。

公开(公告)号：US20070036020A1

公开(公告)日：2007-02-15

申请号：US11195082

申请日：2005-08-01

申请人： Edward Lee ,  Arvind Bomdica ,  Lin Chen ,  Claude Gauthier ,  Sam Huynh ,  Hiok-Tiaq Ng ,  John Ling ,  Jennifer Ho ,  Siji M.K. ,  Gin Yee ,  Joseph Macri

发明人： Edward Lee ,  Arvind Bomdica ,  Lin Chen ,  Claude Gauthier ,  Sam Huynh ,  Hiok-Tiaq Ng ,  John Ling ,  Jennifer Ho ,  Siji M.K. ,  Gin Yee ,  Joseph Macri

IPC分类号： G11C8/00

CPC分类号： H03L7/0814 ,  H03L7/07 ,  H03L7/0805 ,  H04L7/0004 ,  H04L7/0037 ,  H04L7/0337

摘要： An IO method and system for bit-deskewing are described. Embodiment includes a computer system with multiple components that transfer data among them. In one embodiment, a system component receives a forward strobe signal and multiple data bit signals from a transmitting component. The receiving component includes a forward strobe clock recovery circuit configurable to align a forward strobe sampling clock so as to improve sampling accuracy. The receiving component further includes at least one data bit clock recovery circuit configurable to align a data bit sampling clock so as to improve sampling accuracy, and to receive a signal from the forward strobe clock recovery circuit that causes the data bit sampling clock to track the forward strobe sampling clock during system operation.

摘要翻译： 描述了用于位移校正的IO方法和系统。 实施例包括具有在其间传送数据的多个组件的计算机系统。 在一个实施例中，系统组件从发送组件接收正向选通信号和多个数据位信号。 接收组件包括可选择对准前向选通采样时钟以提高采样精度的正向选通时钟恢复电路。 接收组件还包括至少一个数据比特时钟恢复电路，可配置为对准数据比特采样时钟，以提高采样精度，并接收来自正向选通时钟恢复电路的信号，使得数据比特采样时钟跟踪 系统运行期间的正向选通采样时钟。

公开(公告)号：US07688925B2

公开(公告)日：2010-03-30

申请号：US11195082

申请日：2005-08-01

申请人： Edward Lee ,  Arvind Bomdica ,  Lin Chen ,  Claude Gauthier ,  Sam Huynh ,  Hiok-Tiaq Ng ,  John Ling ,  Jennifer Ho ,  Siji Menokki Kandiyil ,  Gin Yee ,  Joseph Macri

发明人： Edward Lee ,  Arvind Bomdica ,  Lin Chen ,  Claude Gauthier ,  Sam Huynh ,  Hiok-Tiaq Ng ,  John Ling ,  Jennifer Ho ,  Siji Menokki Kandiyil ,  Gin Yee ,  Joseph Macri

IPC分类号： H04L7/00

CPC分类号： H03L7/0814 ,  H03L7/07 ,  H03L7/0805 ,  H04L7/0004 ,  H04L7/0037 ,  H04L7/0337

摘要： An IO method and system for bit-deskewing are described. Embodiment includes a computer system with multiple components that transfer data among them. In one embodiment, a system component receives a forward strobe signal and multiple data bit signals from a transmitting component. The receiving component includes a forward strobe clock recovery circuit configurable to align a forward strobe sampling clock so as to improve sampling accuracy. The receiving component further includes at least one data bit clock recovery circuit configurable to align a data bit sampling clock so as to improve sampling accuracy, and to receive a signal from the forward strobe clock recovery circuit that causes the data bit sampling clock to track the forward strobe sampling clock during system operation.

摘要翻译： 描述了用于位移校正的IO方法和系统。 实施例包括具有在其间传送数据的多个组件的计算机系统。 在一个实施例中，系统组件从发送组件接收正向选通信号和多个数据位信号。 接收组件包括可选择对准前向选通采样时钟以提高采样精度的正向选通时钟恢复电路。 接收组件还包括至少一个数据比特时钟恢复电路，可配置为对准数据比特采样时钟，以提高采样精度，并接收来自正向选通时钟恢复电路的信号，使得数据比特采样时钟跟踪 系统运行期间的正向选通采样时钟。

公开(公告)号：USD923259S1

公开(公告)日：2021-06-22

申请号：US29768357

申请日：2021-01-28

申请人： Lin Chen

设计人： Lin Chen

公开(公告)号：US09531792B2

公开(公告)日：2016-12-27

申请号：US14007963

申请日：2012-03-30

申请人： Lin Chen ,  Yuming Mao

发明人： Lin Chen ,  Yuming Mao

IPC分类号： H04L29/08 ,  G06F17/30

CPC分类号： H04L67/10 ,  G06F17/30067

摘要： The present invention proposes a information file generating system and method based on parallel processing. Wherein, said information file generating system based on parallel processing comprises a file request processing device, a control device, a temporary task processing device, an abnormity processing device and an input/output device. Among them, said file request processing device is used to receive and analyze a file request instruction from an application server, and create an information file generation task and at least one temporary information file generation task according to the result of the analysis. The information file generating system and method based on parallel processing disclosed in the present invention are easy to be operated, can ensure the real-time performance and accuracy, and can improve the work efficiency and performance of the system.

摘要翻译： 本发明提出一种基于并行处理的信息文件生成系统和方法。 其中，所述基于并行处理的信息文件生成系统包括文件请求处理装置，控制装置，临时任务处理装置，异常处理装置以及输入输出装置。 其中，所述文件请求处理装置用于从应用服务器接收和分析文件请求指令，并根据分析结果创建信息文件生成任务和至少一个临时信息文件生成任务。 本发明公开的基于并行处理的信息文件生成系统和方法易于操作，可以保证实时的性能和准确性，并能提高系统的工作效率和性能。

公开(公告)号：US09009441B2

公开(公告)日：2015-04-14

申请号：US13487813

申请日：2012-06-04

申请人： Lin Chen ,  Long Chen

发明人： Lin Chen ,  Long Chen

IPC分类号： G06F12/06 ,  G06F9/35

CPC分类号： G06F12/06 ,  G06F9/35 ,  G06F12/0607

摘要： In general, this disclosure describes techniques for selecting a memory channel in a multi-channel memory system for storing data, so that usage of the memory channels is well-balanced. A request to write data to a logical memory address of a memory system may be received. The logical memory address may include a logical page number and a page offset, where the logical page number maps to a physical page number and the logical memory address maps to a physical memory address. A memory unit out of a plurality of memory units in the memory system may be determined by performing a logical operation on one or more bits of the page offset and one or more bits of the physical page number. The data may be written to a physical memory address in the determined memory unit in the memory system.

摘要翻译： 通常，本公开描述了用于在用于存储数据的多通道存储器系统中选择存储器通道的技术，使得存储器通道的使用是良好平衡的。 可以接收将数据写入存储器系统的逻辑存储器地址的请求。 逻辑存储器地址可以包括逻辑页码和页偏移，其中逻辑页码映射到物理页号，并且逻辑存储器地址映射到物理存储器地址。 存储器系统中的多个存储器单元中的存储单元可以通过对页面偏移的一个或多个位和物理页码的一个或多个位执行逻辑运算来确定。 数据可以写入存储器系统中确定的存储器单元中的物理存储器地址。

公开(公告)号：US08780886B2

公开(公告)日：2014-07-15

申请号：US13571534

申请日：2012-08-10

申请人： Jian Wen Chen ,  Lin Chen ,  Yonghua Lin ,  Qing Wang ,  Rong Yan ,  Zhen Bo Zhu

发明人： Jian Wen Chen ,  Lin Chen ,  Yonghua Lin ,  Qing Wang ,  Rong Yan ,  Zhen Bo Zhu

IPC分类号： H04J3/06

CPC分类号： H04W56/004 ,  H04W56/0055 ,  H04W88/085

摘要： A wireless communication system base station, and a remote radio head (RRH) and a computer-implemented synchronization method for the wireless communication system base station. The RRH is communicably coupled to a baseband unit (BBU) of the wireless communication system base station through a network, and the BBU processes and transmits downlink data to the RRH. The RRH includes: a time-delay measurement unit for measuring a time-delay for the downlink data to arrive at the RRH from the BBU; and a time-delay notification unit for notifying from the RRH to the BBU of time-delay data on the time-delay measured by the time-delay measurement unit, wherein the time-delay data is used to advance the starting time for the BBU to process and transmit the downlink data by an amount of time obtained based on the time-delay data.

公开(公告)号：US08767710B2

公开(公告)日：2014-07-01

申请号：US13392887

申请日：2010-08-17

申请人： Jian Wen Chen ,  Lin Chen ,  Yonghua Lin ,  Qing Wang ,  Rong Yan ,  Zhen Bo Zhu

发明人： Jian Wen Chen ,  Lin Chen ,  Yonghua Lin ,  Qing Wang ,  Rong Yan ,  Zhen Bo Zhu

IPC分类号： H04J3/06

CPC分类号： H04W56/004 ,  H04W56/0055 ,  H04W88/085

摘要： A wireless communication system base station, and a remote radio head (RRH) and a computer-implemented synchronization method for the wireless communication system base station. The RRH is communicably coupled to a baseband unit (BBU) of the wireless communication system base station through a network, and the BBU processes and transmits downlink data to the RRH. The RRH includes: a time-delay measurement unit for measuring a time-delay for the downlink data to arrive at the RRH from the BBU; and a time-delay notification unit for notifying from the RRH to the BBU of time-delay data on the time-delay measured by the time-delay measurement unit, wherein the time-delay data is used to advance the starting time for the BBU to process and transmit the downlink data by an amount of time obtained based on the time-delay data.

摘要翻译： 无线通信系统基站，以及用于无线通信系统基站的远程无线电头（RRH）和计算机实现的同步方法。 RRH通过网络可通信地耦合到无线通信系统基站的基带单元（BBU），并且BBU处理并向RRH发送下行链路数据。 RRH包括：时间延迟测量单元，用于测量从BBU到达RRH的下行链路数据的时间延迟; 以及时间延迟通知单元，用于从RRH向BBU通知由延时测量单元测量的时间延迟数据，其中时延数据用于提前BBU的开始时间 根据时间延迟数据获得的时间量来处理和发送下行数据。