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公开(公告)号:US20230113877A1
公开(公告)日:2023-04-13
申请号:US18065062
申请日:2022-12-13
Applicant: MICRON TECHNOLOGY, INC.
Inventor: FA-LONG LUO , JAIME CUMMINS , TAMARA SCHMITZ , JEREMY CHRITZ
Abstract: Examples described herein include systems and methods which include wireless devices and systems with examples of full duplex compensation with a self-interference noise calculator that compensates for the self-interference noise generated by power amplifiers at harmonic frequencies of a respective wireless receiver. The self-interference noise calculator may be coupled to antennas of a wireless device and configured to generate the adjusted signals that compensate self-interference. The self-interference noise calculator may include a network of processing elements configured to combine transmission signals into sets of intermediate results. Each set of intermediate results may be summed in the self-interference noise calculator to generate a corresponding adjusted signal. The adjusted signal is receivable by a corresponding wireless receiver to compensate for the self-interference noise generated by a wireless transmitter transmitting on the same or different frequency band as the wireless receiver is receiving.
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公开(公告)号:US20210160195A1
公开(公告)日:2021-05-27
申请号:US17162871
申请日:2021-01-29
Applicant: MICRON TECHNOLOGY, INC.
Inventor: JEREMY CHRITZ , TAMARA SCHMITZ , JOHN L. WATSON , JOHN SCHROETER , FA-LONG LUO , JAIME CUMMINS
IPC: H04L12/933 , H04B7/04 , H04W4/80 , H04B5/00 , H04W40/06 , H04L12/947 , H04L12/931
Abstract: An apparatus is disclosed. The apparatus comprises a plurality of antennas and an integrated circuit chip coupled to the plurality of antennas, and is configured to process cellular signals received from the plurality of antennas in accordance with a cellular communication protocol and to process radio frequency identification (RFID) signals received from the plurality of antennas in accordance with an RFID protocol.
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公开(公告)号:US20210159928A1
公开(公告)日:2021-05-27
申请号:US17162992
申请日:2021-01-29
Applicant: MICRON TECHNOLOGY, INC.
Inventor: FA-LONG LUO , JEREMY CHRITZ , JAIME CUMMINS , TAMARA SCHMITZ
Abstract: Examples described herein include methods, devices, and systems which may compensate input data for non-linear power amplifier noise to generate compensated input data. In compensating the noise, during an uplink transmission time interval (TTI), a switch path is activated to provide amplified input data to a receiver stage including a coefficient calculator. The coefficient calculator may calculate an error representative of the noise based partly on the input signal to be transmitted and a feedback signal to generate coefficient data associated with the power amplifier noise. The feedback signal is provided, after processing through the receiver, to a coefficient calculator. During an uplink TTI, the amplified input data may also be transmitted as the RF wireless transmission via an RF antenna. During a downlink TTI, the switch path may be deactivated and the receiver stage may receive an additional RF wireless transmission to be processed in the receiver stage.
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公开(公告)号:US20200076481A1
公开(公告)日:2020-03-05
申请号:US16115866
申请日:2018-08-29
Applicant: MICRON TECHNOLOGY, INC.
Inventor: Fa-Long Luo , JAIME CUMMINS , TAMARA SCHMITZ , JEREMY CHRITZ
IPC: H04B7/0413 , G06N3/04 , G06N3/08
Abstract: Examples described herein include systems and methods, including wireless devices and systems with neuron calculators that may perform one or more functionalities of a wireless transceiver. The neuron calculator calculates output signals that may be implemented, for example, using accumulation units that sum the multiplicative processing results of ordered sets from ordered neurons with connection weights for each connection between an ordered neuron and outputs of the neuron calculator. The ordered sets may be a combination of some input signals, with the number of signals determined by an order of the neuron. Accordingly, a kth-order neuron may include an ordered set comprising product values of k input signals, where the input signals are selected from a set of k-combinations with repetition. As an example in a wireless transceiver, the neuron calculator may perform channel estimation as a channel estimation processing component of the receiver portion of a wireless transceiver.
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5.
公开(公告)号:US20180152330A1
公开(公告)日:2018-05-31
申请号:US15365326
申请日:2016-11-30
Applicant: MICRON TECHNOLOGY, INC.
Inventor: JEREMY CHRITZ , TAMARA SCHMITZ , FA-LONG LUO , JAIME CUMMINS
IPC: H04L27/26
CPC classification number: H04L27/2628 , G06F19/00 , H04B1/0039 , H04L27/2601 , H04L27/265
Abstract: Examples described herein include systems and methods which include wireless devices and systems with examples of mixing input data with coefficient data. For example, a computing system with processing units may mix the input data for a transmission in a radio frequency (RF) wireless domain with the coefficient data to generate output data that is representative of the transmission being processed according to the wireless protocol in the RF wireless domain. A computing device may be trained to generate coefficient data based on the operations of a wireless transceiver such that mixing input data using the coefficient data generates an approximation of the output data, as if it were processed by the wireless transceiver. Examples of systems and methods described herein may facilitate the processing of data for 5G wireless communications in a power-efficient and time-efficient manner.
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6.
公开(公告)号:US20230262731A1
公开(公告)日:2023-08-17
申请号:US18306694
申请日:2023-04-25
Applicant: MICRON TECHNOLOGY, INC.
Inventor: FA-LONG LUO , JAIME CUMMINS , TAMARA SCHMITZ , JEREMY CHRITZ
CPC classification number: H04W72/29 , H04W88/085 , Y02D30/70
Abstract: Examples described herein include systems and methods which include wireless devices and systems with examples of configuration modes for baseband units (BBU) and remote radio heads (RRH). For example, a computing system including a BBU and a RRH may receive a configuration mode selection including information indicative of a configuration mode for respective processing units of the BBU and the RRH. The computing system allocates the respective processing units to perform wireless processing stages associated with a wireless protocol. The BBU and/or the RRH may generate an output data stream based on the mixing of coefficient data with input data at the BBU and/or the RRH. Examples of systems and methods described herein may facilitate the processing of data for 5G wireless communications in a power-efficient and time-efficient manner.
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公开(公告)号:US20230208449A1
公开(公告)日:2023-06-29
申请号:US18179317
申请日:2023-03-06
Applicant: MICRON TECHNOLOGY, INC.
Inventor: FA-LONG LUO , JAIME CUMMINS , TAMARA SCHMITZ
CPC classification number: H03M13/6597 , H03M13/1515 , H03M13/152 , G06N3/08 , G06F17/18 , H03M13/1102 , G06F18/23213 , G06N3/047
Abstract: Examples described herein utilize multi-layer neural networks to decode encoded data (e.g., data encoded using one or more encoding techniques). The neural networks may have nonlinear mapping and distributed processing capabilities which may be advantageous in many systems employing the neural network decoders. In this manner, neural networks described herein may be used to implement error code correction (ECC) decoders.
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公开(公告)号:US20210182074A1
公开(公告)日:2021-06-17
申请号:US17184945
申请日:2021-02-25
Applicant: MICRON TECHNOLOGY, INC.
Inventor: FA-LONG LUO , TAMARA SCHMITZ , JEREMY CHRITZ , JAIME CUMMINS
Abstract: Examples described herein include systems and methods which include an apparatus comprising a plurality of configurable logic units and a plurality of switches, with each switch being coupled to at least one configurable logic unit of the plurality of configurable logic units. The apparatus further includes an instruction register configured to provide respective switch instructions of a plurality of switch instructions to each switch based on a computation to be implemented among the plurality of configurable logic units. For example, the switch instructions may include allocating the plurality of configurable logic units to perform the computation and activating an input of the switch and an output of the switch to couple at least a first configurable logic unit and a second configurable logic unit. In various embodiments, configurable logic units can include arithmetic logic units (ALUs), bit manipulation units (BMUs), and multiplier-accumulator units (MACs).
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公开(公告)号:US20200235794A1
公开(公告)日:2020-07-23
申请号:US16844178
申请日:2020-04-09
Applicant: MICRON TECHNOLOGY, INC.
Inventor: FA-LONG LUO , TAMARA SCHMITZ , JEREMY CHRITZ , JAIME CUMMINS
IPC: H04B7/0456 , H04B7/08 , G06F17/15 , H04B7/0413
Abstract: Examples described herein include systems and methods which include wireless devices and systems with examples of an autocorrelation calculator. An electronic device including an autocorrelation calculator may be configured to calculate an autocorrelation matrix including an autocorrelation of symbols indicative of a first radio frequency (“RF”) signal and a second RF signal. The electronic device may calculate the autocorrelation matrix based on a stored autocorrelation matrix and the autocorrelation of symbols indicative of the first RF signal and symbols indicative of the second RF signal. The stored autocorrelation matrix may represent another received signal at a different time period than a time period of the first and second RF signals. Examples of the systems and methods may facilitate the processing of data for wireless and may utilize less memory space than a device than a scheme that stores and calculates autocorrelation from a large dataset computed from various time points.
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公开(公告)号:US20180307483A1
公开(公告)日:2018-10-25
申请号:US15493551
申请日:2017-04-21
Applicant: MICRON TECHNOLOGY, INC.
Inventor: FA-LONG LUO , TAMARA SCHMITZ , JEREMY CHRITZ , JAIME CUMMINS
IPC: G06F9/30
CPC classification number: G06F9/3001 , G06F9/30098 , G06F9/30145
Abstract: Examples described herein include systems and methods which include an apparatus comprising a plurality of configurable logic units and a plurality of switches, with each switch being coupled to at least one configurable logic unit of the plurality of configurable logic units. The apparatus further includes an instruction register configured to provide respective switch instructions of a plurality of switch instructions to each switch based on a computation to be implemented among the plurality of configurable logic units. For example, the switch instructions may include allocating the plurality of configurable logic units to perform the computation and activating an input of the switch and an output of the switch to couple at least a first configurable logic unit and a second configurable logic unit. In various embodiments, configurable logic units can include arithmetic logic units (ALUs), bit manipulation units (BMUs), and multiplier-accumulator units (MACs).
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