公开(公告)号：US20240146402A1

公开(公告)日：2024-05-02

申请号：US18201821

申请日：2023-05-25

申请人： Seakr Engineering, Inc.

发明人： Paul RUTT ,  Erik Buehler ,  Damon Van Buren

IPC分类号： H04B7/185 ,  H04B1/00 ,  H04B1/40 ,  H04B1/44 ,  H04B7/08 ,  H04B7/212

CPC分类号： H04B7/18515 ,  H04B1/0007 ,  H04B1/0014 ,  H04B1/0039 ,  H04B1/0042 ,  H04B1/0046 ,  H04B1/40 ,  H04B1/44 ,  H04B7/08 ,  H04B7/1851 ,  H04B7/212

摘要： An integrated analog to digital converting and digital to analog converting (ADDA) RF transceiver for satellite applications, configured to replace conventional analog RF down and up conversion circuitry. The ADDA RF transceiver includes one of more ADCs, DSPs, and DACs, all on a single ASIC. Further, the circuitry is to be radiation tolerant for high availability and reliability in the ionizing radiation environment present in the space environment.

公开(公告)号：US20180102793A1

公开(公告)日：2018-04-12

申请号：US15286825

申请日：2016-10-06

申请人： GM GLOBAL TECHNOLOGY OPERATIONS LLC

发明人： Timothy J. Talty ,  Mohiuddin Ahmed ,  Cynthia D. Baringer ,  Jongchan Kang ,  Yen-Cheng Kuan ,  James Chingwei Li ,  Emilio A. Sovero

IPC分类号： H04B1/00 ,  H04W4/02

CPC分类号： H04B1/0003 ,  H04B1/0032 ,  H04B1/0035 ,  H04B1/0039 ,  H04W84/12 ,  H04W88/06

摘要： A method and apparatus for dynamically modifying filter characteristics of a Delta-Sigma modulator. The system is used for wide bandwidth radio system designed to adapt to various global radio standards and, more particularly, to a cellular radio architecture that employs a combination of a single circulator, programmable band-pass sampling radio frequency (RF) front-end and optimized digital baseband that is capable of supporting all current cellular wireless access protocol frequency bands.

公开(公告)号：US20150295749A1

公开(公告)日：2015-10-15

申请号：US14693416

申请日：2015-04-22

申请人： Texas Instruments Incorporated

发明人： Raghu Ganesan ,  Bijoy Bhukania ,  Jaiganesh Balakrishnan

IPC分类号： H04L27/38 ,  H04B1/00

CPC分类号： H04L27/3863 ,  H04B1/0039

摘要： Apparatus and methods disclosed herein perform gain, clipping, and phase compensation in the presence of I/Q mismatch in quadrature RF receivers. Gain and phase mismatch are exacerbated by differences in clipping between I & Q signals in low resolution ADCs. Signals in the stronger channel arm are clipped differentially more than weaker signals in the other channel arm. Embodiments herein perform clipping operations during iterations of gain mismatch calculations in order to balance clipping between the I and Q channel arms. Gain compensation coefficients are iteratively converged, clipping levels are established, and data flowing through the network is gain and clipping compensated. A compensation phase angle and phase compensation coefficients are then determined from gain and clipping compensated sample data. The resulting phase compensation coefficients are applied to the gain and clipping corrected receiver data to yield a gain, clipping, and phase compensated data stream.

摘要翻译： 在正交RF接收机中存在I / Q失配的情况下，本文公开的装置和方法执行增益，限幅和相位补偿。 由于低分辨率ADC中I＆Q信号之间的限幅差异，增益和相位失配加剧。 更强的信道臂中的信号比另一个信道臂中的较弱的信号差分地被削波。 本文实施例在增益失配计算的迭代期间执行削波操作，以平衡I和Q通道臂之间的限幅。 增益补偿系数迭代收敛，建立限幅电平，流经网络的数据得到增益和限幅补偿。 然后从增益和削波补偿采样数据确定补偿相位角和相位补偿系数。 所得到的相位补偿系数被应用于增益和限幅校正的接收机数据，以产生增益，限幅和相位补偿的数据流。

公开(公告)号：US20140328434A1

公开(公告)日：2014-11-06

申请号：US14360805

申请日：2012-12-04

申请人： RWTH AACHEN

发明人： Renato Negra ,  Bjorn Thorsten Thiel

IPC分类号： H04B1/00 ,  H04L27/20

CPC分类号： H04B1/0039 ,  H03M3/40 ,  H03M3/50 ,  H03M7/3028 ,  H04L27/2053 ,  H04L27/2092 ,  H04L27/362

摘要： The invention relates to a transmitter front-end device for generating output signals representing a digital stream, wherein the device has at least one first input for a first input signal and at least one second input for a second input signal, with the first input signal and the second input signal representing a complex data signal of the digital stream and being intended to influence an output signal of the transmitter front-end device. Furthermore, the transmitter front-end device has at least one phase generation device which generates at least one additional phase signal on the basis of the first input signal and the second input signal, with at least 3 phase signals being outputted by the phase generation device with different phases with respect to each other, at least one modulator that is set up such that it generates a complementary phase signal pair from a received phase signal, with each of the at least 3 phase signals being processed by an associated modulator into a corresponding complementary phase signal pair. Furthermore, the transmitter front-end device has at least one frequency converter that is set up such that it converts phase signals of a complementary phase signal pair with a high-frequency signal in order to form an output signal.

摘要翻译： 本发明涉及用于产生表示数字流的输出信号的发射机前端设备，其中该设备具有用于第一输入信号的至少一个第一输入和用于第二输入信号的至少一个第二输入，其中第一输入信号 并且第二输入信号表示数字流的复数数据信号，并且旨在影响发射机前端设备的输出信号。 此外，发射机前端设备具有至少一个相位产生装置，其基于第一输入信号和第二输入信号产生至少一个附加相位信号，至少三相信号由相位产生装置输出 相对于彼此具有不同的相位，至少一个调制器被设置成使得其从接收的相位信号产生互补相位信号对，其中至少3个相位信号中的每一个被相关联的调制器处理成相应的 互补相位信号对。 此外，发射机前端设备具有至少一个频率转换器，其被设置成使得其与高频信号转换互补相位信号对的相位信号，以便形成输出信号。

公开(公告)号：US08090416B2

公开(公告)日：2012-01-03

申请号：US12169756

申请日：2008-07-09

申请人： Takashi Oshima ,  Taizo Yamawaki

发明人： Takashi Oshima ,  Taizo Yamawaki

IPC分类号： H04B1/16

CPC分类号： H04B1/0039

摘要： Conventional digital calibration type analog-to-digital converters cannot converge calibration within an preamble period of a packet signal. An analog-to-digital converter is subjected to digital calibration using a beacon signal, a polling signal, or another user signal or a signal applied from a transceiver side to a receiver side. Some or all of circuits are brought into a sleep mode in a period except data reception and the analog-to-digital converter calibration such that a signal monitor unit detects another signal to activate the circuit in the sleep mode for performing the calibration of the analog-to-digital converter for reducing the power consumption.

摘要翻译： 传统的数字校准型模数转换器不能在分组信号的前同步码周期内收敛校准。 使用信标信号，轮询信号或另一用户信号或从收发机侧向接收机侧施加的信号对模数转换器进行数字校准。 部分或全部电路在除了数据接收和模数转换器校准之外的周期中进入休眠模式，使得信号监视单元检测到另一个信号，以在睡眠模式下激活电路，以执行模拟 数字转换器，用于降低功耗。

公开(公告)号：US08085838B2

公开(公告)日：2011-12-27

申请号：US10157688

申请日：2002-05-29

申请人： Robert Fifield

发明人： Robert Fifield

IPC分类号： H03K5/159

CPC分类号： H04B1/123 ,  H03H21/0021 ,  H03H21/0027 ,  H03H21/0043 ,  H04B1/0003 ,  H04B1/0032 ,  H04B1/0035 ,  H04B1/0039 ,  H04B1/30 ,  H04B1/7136 ,  H04B2001/71367

摘要： A receiver comprises an adaptive filter having an input for a digitized input signal, means for storing a pre-designed filter characteristic, means for analyzing a digital representation of the input signal to determine a desired position of the filter characteristic to match the system requirements, and means for adapting the stored pre-designed filter characteristic in the frequency domain and/or the time domain to match the system requirements and for transforming the adapted filter characteristic to the time domain to update coefficients for the adaptive filter and for loading updated coefficients into adaptive filter. The updating of the coefficients may be done periodically. The adaptation may be one or more of adjusting bandwidth, frequency shift and, in the case of a bandpass characteristic, superimposing characteristics.

摘要翻译： 接收机包括具有用于数字化输入信号的输入的自适应滤波器，用于存储预先设计的滤波器特性的装置，用于分析输入信号的数字表示以确定滤波器特性以满足系统要求的期望位置的装置， 以及用于在频域和/或时域中调整所存储的预先设计的滤波器特性以匹配系统要求并将适应的滤波器特性变换到时域以更新自适应滤波器的系数并将更新后的系数加载到 自适应滤波器。 系数的更新可以周期性地进行。 适应可以是调整带宽，频移以及在带通特性的情况下的叠加特性中的一个或多个。

公开(公告)号：US07773968B2

公开(公告)日：2010-08-10

申请号：US11565487

申请日：2006-11-30

申请人： Adrian Maxim ,  Charles D. Thompson ,  Mitchell Reid

发明人： Adrian Maxim ,  Charles D. Thompson ,  Mitchell Reid

IPC分类号： H04B1/10

CPC分类号： H04B1/28 ,  H04B1/001 ,  H04B1/0039

摘要： A receiver (1300) includes a mixing digital-to-analog converter (DAC) (1306), a direct digital frequency synthesizer (DDFS) (132A) and an interface (134D). The mixing DAC (1306) includes a radio frequency (RF) transconductance section (1308) and a switching section (1310). The RE transconductance section (1308) includes an input for receiving an RF signal and an output for providing an RE current signal. The switching section (1310) is coupled to the RF transconductance section (1308) and includes inputs for receiving bits associated with a digital local oscillator (LO) signal and an output that is configured to provide an analog output signal. The DDFS (132A) includes outputs configured to provide the bits associated with the digital LO signal to the inputs of the switching section (1310). The interface (134D) is coupled to the DDFS (132A) and is configured to align the bits provided by the DDFS (132A) with a first clock signal.

摘要翻译： 接收器（1300）包括混合数模转换器（DAC）（1306），直接数字频率合成器（DDFS）（132A）和接口（134D）。 混合DAC（1306）包括射频（RF）跨导部分（1308）和切换部分（1310）。 RF跨导部分（1308）包括用于接收RF信号的输入端和用于提供RF电流信号的输出端。 开关部分（1310）耦合到RF跨导部分（1308），并且包括用于接收与数字本地振荡器（LO）信号相关联的位的输入和被配置为提供模拟输出信号的输出。 DDFS（132A）包括被配置为将与数字LO信号相关联的位提供给切换部分（1310）的输入的输出。 接口（134D）耦合到DDFS（132A），并且被配置为将由DDFS（132A）提供的位与第一时钟信号对准。

公开(公告)号：US20100119012A1

公开(公告)日：2010-05-13

申请号：US12268982

申请日：2008-11-11

申请人： Debajyoti Pal

发明人： Debajyoti Pal

IPC分类号： H04L27/22

CPC分类号： H04B1/0039 ,  H04B1/0092 ,  H04B1/30

摘要： A receiver uses a wideband intermediate frequency (IF) in the analog domain and performs low IF down-conversion in the digital domain, using low-power, high-speed, high resolution analog-to-digital converters. The receiver can be integrated into an integrated circuit as one of several receivers. Such an integrated circuit may include multiple transmitters using adaptive non-linear modeling pre-distortion. The non-linear modeling may include memory. Imbalance in intermediate frequency in-phase and quadrature signals may be corrected in the digital domains. DC offsets in the intermediate signal may be corrected in both analog and digital domains. In one instance, the receiver provides a feedback receiver for the adaptive pre-distorter in a transmitter on the integrated circuit.

公开(公告)号：US20090322578A1

公开(公告)日：2009-12-31

申请号：US12163962

申请日：2008-06-27

申请人： Branislav Petrovic

发明人： Branislav Petrovic

IPC分类号： H03M1/12 ,  G01R25/00

CPC分类号： H04B1/28 ,  H04B1/0039 ,  H04L27/38

摘要： Methods and apparatuses are provided for performing direct quadrature sampling. One method for sampling quadrature baseband components of a bandpass signal includes receiving a bandpass signal, sampling the bandpass signal using a first sampling clock and a second sampling clock, where the first and the second sampling clocks have the same frequency and are offset by a predetermined phase, and aligning the sampled signals temporally to produce in-phase and quadrature samples corresponding to baseband in-phase and quadrature components. An apparatus for directly sampling baseband quadrature components of a bandpass signal is also presented, which includes a first analog-to-digital converter (ADC) configured to receive a bandpass signal, a second ADC configured to receive the bandpass signal, where the second ADC has a clock having a phase offset with respect to clock signal of the first ADC, and an interpolator coupled to the first ADC configured provide coincident samples.

摘要翻译： 提供了用于执行直接正交采样的方法和装置。 用于对带通信号的正交基带分量进行采样的一种方法包括：接收带通信号，使用第一采样时钟和第二采样时钟采样带通信号，其中第一和第二采样时钟具有相同的频率并被预定的 并且对采样的信号进行时间对准以产生对应于基带同相和正交分量的同相和正交采样。 还提出了用于直接采样带通信号的基带正交分量的装置，其包括被配置为接收带通信号的第一模数转换器（ADC），被配置为接收带通信号的第二ADC，其中第二ADC 具有相对于第一ADC的时钟信号具有相位偏移的时钟，并且耦合到配置的第一ADC的内插器提供重合样本。

公开(公告)号：US07254379B2

公开(公告)日：2007-08-07

申请号：US10887702

申请日：2004-07-09

申请人： Zhiwei Xu ,  Shan Jiang ,  Charles Chien

发明人： Zhiwei Xu ,  Shan Jiang ,  Charles Chien

IPC分类号： H04B1/10 ,  H04B17/00 ,  H04L1/00

CPC分类号： H04B1/28 ,  H04B1/0039 ,  H04B17/21

摘要： A calibration system for an RF system that includes an RF receiver capable of operating in a normal mode and in a calibration mode. The calibration system includes a phase delay unit provided on at least one of an I channel output and a Q channel output of the RF receiver. The system further includes a phase detector configured to detect a phase difference between the I channel output of the RF receiver and the Q channel output of the RF receiver. The system also includes a calibration control unit configured to provide a digital calibration control signal to the RF receiver based on the phase difference as provided by the phase detector.

摘要翻译： 一种用于RF系统的校准系统，其包括能够以正常模式和校准模式操作的RF接收器。 校准系统包括设置在RF接收器的I通道输出和Q通道输出中的至少一个上的相位延迟单元。 该系统还包括相位检测器，被配置为检测RF接收机的I信道输出与RF接收机的Q信道输出之间的相位差。 该系统还包括校准控制单元，其被配置为基于由相位检测器提供的相位差向RF接收器提供数字校准控制信号。