公开(公告)号：US10103029B2

公开(公告)日：2018-10-16

申请号：US15148738

申请日：2016-05-06

Applicant: MacDermid Enthone Inc.

Inventor： Thomas B. Richardson ,  Joseph A. Abys ,  Wenbo Shao ,  Chen Wang ,  Vincent Paneccasio ,  Cai Wang ,  Sean Xuan Lin ,  Theodore Antonellis

IPC: H01L21/28 ,  H01L21/288 ,  C25D3/38 ,  C25D5/18 ,  H01L21/768 ,  C25D7/12 ,  C25D5/02

Abstract: A process for metalizing a through silicon via feature in a semiconductor integrated circuit device, the process including, during the filling cycle, reversing the polarity of circuit for an interval to generate an anodic potential at said metalizing substrate and desorb leveler from the copper surface within the via, followed by resuming copper deposition by re-establishing the surface of the copper within the via as the cathode in the circuit, thereby yielding a copper filled via feature.