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公开(公告)号:US11168406B2
公开(公告)日:2021-11-09
申请号:US16672720
申请日:2019-11-04
Applicant: MacDermid Enthone Inc.
Inventor: Vincent Paneccasio , Kyle Whitten , Thomas B. Richardson , Ivan Li
IPC: C25D3/38 , C08G65/333 , H05K3/18 , H05K3/42 , C25D7/12 , C08G65/24 , C08L71/03 , H01L21/768 , H01L21/48 , H01L21/288
Abstract: An aqueous electrolytic composition and a process for electrodeposition of copper on a dielectric or semiconductor base structure using the aqueous electrolytic composition. The process includes (i) contacting a metalizing substrate comprising a seminal conductive layer on the base structure with an aqueous electrolytic deposition composition; and (ii) supplying electrical current to the electrolytic deposition composition to deposit copper on the substrate. The aqueous electrolytic composition comprises: (a) copper ions; (b) an acid; (c) a suppressor; and (d) a quaternized poly(epihalohydrin) comprising n repeating units corresponding to structure 1N and p repeating units corresponding to structure 1P:
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公开(公告)号:US20200063280A1
公开(公告)日:2020-02-27
申请号:US16672720
申请日:2019-11-04
Applicant: MacDermid Enthone Inc.
Inventor: Vincent Paneccasio , Kyle Whitten , Thomas B. Richardson , Ivan Li
Abstract: An aqueous electrolytic composition and a process for electrodeposition of copper on a dielectric or semiconductor base structure using the aqueous electrolytic composition. The process includes (i) contacting a metalizing substrate comprising a seminal conductive layer on the base structure with an aqueous electrolytic deposition composition; and (ii) supplying electrical current to the electrolytic deposition composition to deposit copper on the substrate. The aqueous electrolytic composition comprises: (a) copper ions; (b) an acid; (c) a suppressor; and (d) a quaternized poly(epihalohydrin) comprising n repeating units corresponding to structure 1N and p repeating units corresponding to structure 1P:
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公开(公告)号:US10103029B2
公开(公告)日:2018-10-16
申请号:US15148738
申请日:2016-05-06
Applicant: MacDermid Enthone Inc.
Inventor: Thomas B. Richardson , Joseph A. Abys , Wenbo Shao , Chen Wang , Vincent Paneccasio , Cai Wang , Sean Xuan Lin , Theodore Antonellis
IPC: H01L21/28 , H01L21/288 , C25D3/38 , C25D5/18 , H01L21/768 , C25D7/12 , C25D5/02
Abstract: A process for metalizing a through silicon via feature in a semiconductor integrated circuit device, the process including, during the filling cycle, reversing the polarity of circuit for an interval to generate an anodic potential at said metalizing substrate and desorb leveler from the copper surface within the via, followed by resuming copper deposition by re-establishing the surface of the copper within the via as the cathode in the circuit, thereby yielding a copper filled via feature.
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