公开(公告)号：US20160211861A1

公开(公告)日：2016-07-21

申请号：US14886545

申请日：2015-10-19

Applicant: MediaTek Inc.

Inventor： Frank Op 't Eynde ,  Nathan Egan ,  Khurram Muhammad ,  Tien-Yu Lo ,  Chi-Lun Lo ,  Michael A. Ashburn

IPC: H03M3/00

CPC classification number: H03M1/109 ,  H03M1/1038 ,  H03M1/12 ,  H03M3/50

Abstract: Systems and methods for measuring and compensating a DC-transfer characteristic of analog-to-digital converters are described. A test-signal generator comprising a sigma-delta modulator may provide calibration signals to an ADC. An output from the ADC may be filtered with a notch filter to suppress quantization noise at discrete frequencies introduced by the sigma-delta modulator. The resulting filtered signal may be compared against an input digital signal to the test-signal generator to determine a transfer characteristic of the ADC.

Abstract translation: 描述了用于测量和补偿模数转换器的直流传递特性的系统和方法。 包括Σ-Δ调制器的测试信号发生器可以向ADC提供校准信号。 来自ADC的输出可以用陷波滤波器滤波，以抑制由Σ-Δ调制器引入的离散频率的量化噪声。 所得到的滤波信号可以与输入的数字信号与测试信号发生器进行比较，以确定ADC的传输特性。

公开(公告)号：US09584146B2

公开(公告)日：2017-02-28

申请号：US14886545

申请日：2015-10-19

Applicant: MediaTek Inc.

Inventor： Frank Op 't Eynde ,  Nathan Egan ,  Khurram Muhammad ,  Tien-Yu Lo ,  Chi-Lun Lo ,  Michael A. Ashburn

IPC: H03M1/10 ,  H03M1/12 ,  H03M3/00

CPC classification number: H03M1/109 ,  H03M1/1038 ,  H03M1/12 ,  H03M3/50

Abstract: Systems and methods for measuring and compensating a DC-transfer characteristic of analog-to-digital converters are described. A test-signal generator comprising a sigma-delta modulator may provide calibration signals to an ADC. An output from the ADC may be filtered with a notch filter to suppress quantization noise at discrete frequencies introduced by the sigma-delta modulator. The resulting filtered signal may be compared against an input digital signal to the test-signal generator to determine a transfer characteristic of the ADC.

Abstract translation: 描述了用于测量和补偿模数转换器的直流传递特性的系统和方法。 包括Σ-Δ调制器的测试信号发生器可以向ADC提供校准信号。 来自ADC的输出可以用陷波滤波器滤波，以抑制由Σ-Δ调制器引入的离散频率的量化噪声。 所得到的滤波信号可以与输入的数字信号与测试信号发生器进行比较，以确定ADC的传输特性。

公开(公告)号：US20160204793A1

公开(公告)日：2016-07-14

申请号：US14842353

申请日：2015-09-01

Applicant: MediaTek Inc.

Inventor： Frank Op 't Eynde ,  Chi-Lun Lo ,  Michael A. Ashburn

IPC: H03M3/00

CPC classification number: H03M3/332 ,  H03F3/505 ,  H03F2200/331 ,  H03F2203/5021 ,  H03F2203/5031 ,  H03F2203/5033 ,  H03M1/00 ,  H03M1/0641 ,  H03M1/12 ,  H03M3/458

Abstract: Systems and methods for reducing spurious noise tones in sigma-delta analog-to-digital converters (ADCs) are described. A dither signal may be added to two differential input signals of a pseudo-differential sigma-delta ADC. The dither signal may be generated by a pseudo-random bit sequence generator and applied to two input buffers, which add the dither signal to received differential analog input signals. The dithered signals may be digitized by two independent sigma-delta ADCs and then subtracted to remove the dither signal from an overall digital output signal.

Abstract translation: 描述了用于减小Σ-Δ模数转换器（ADC）中的杂散噪声音调的系统和方法。 可以将抖动信号添加到伪差分Σ-ΔADC的两个差分输入信号。 抖动信号可以由伪随机比特序列发生器产生，并被施加到两个输入缓冲器，其将抖动信号加到接收到的差分模拟输入信号。 抖动信号可以由两个独立的Σ-ΔADC数字化，然后被减去以从整体数字输出信号中去除抖动信号。

公开(公告)号：US09385745B1

公开(公告)日：2016-07-05

申请号：US14842353

申请日：2015-09-01

Applicant: MediaTek Inc.

Inventor： Frank Op 't Eynde ,  Chi-Lun Lo ,  Michael A. Ashburn

IPC: H03M1/20 ,  H03M3/00 ,  H03M1/00 ,  H03M1/12 ,  H03M1/06

CPC classification number: H03M3/332 ,  H03F3/505 ,  H03F2200/331 ,  H03F2203/5021 ,  H03F2203/5031 ,  H03F2203/5033 ,  H03M1/00 ,  H03M1/0641 ,  H03M1/12 ,  H03M3/458

Abstract: Systems and methods for reducing spurious noise tones in sigma-delta analog-to-digital converters (ADCs) are described. A dither signal may be added to two differential input signals of a pseudo-differential sigma-delta ADC. The dither signal may be generated by a pseudo-random bit sequence generator and applied to two input buffers, which add the dither signal to received differential analog input signals. The dithered signals may be digitized by two independent sigma-delta ADCs and then subtracted to remove the dither signal from an overall digital output signal.

Abstract translation: 描述了用于减小Σ-Δ模数转换器（ADC）中的杂散噪声音调的系统和方法。 可以将抖动信号添加到伪差分Σ-ΔADC的两个差分输入信号。 抖动信号可以由伪随机比特序列发生器产生，并被施加到两个输入缓冲器，其将抖动信号加到接收到的差分模拟输入信号。 抖动信号可以由两个独立的Σ-ΔADC数字化，然后被减去以从整体数字输出信号中去除抖动信号。