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    Emergency support member
    1.
    发明授权
    Emergency support member 失效
    紧急支援会员

    公开(公告)号：US06705368B2

    公开(公告)日：2004-03-16

    申请号：US10180211

    申请日：2002-06-26

    申请人： Michael Glinz ,  Silvia Kuhlmann ,  Andreas Dieckmann

    发明人： Michael Glinz ,  Silvia Kuhlmann ,  Andreas Dieckmann

    IPC分类号： B60C1704

    CPC分类号： B60C17/06 ,  B60C17/04 ,  B60C17/041 ,  B60C17/043

    摘要： An emergency support member is provided for a vehicle wheel and tire assembly having a pneumatic tire that is mounted on a wheel rim. The support member is embodied as a dished annular member within the tire, and has an emergency support surface for supporting the tire in the event of damage thereto. The annular member extends axially from the center of the rim and symmetrically over a portion of the width thereof. The annular member has a curved contour, with the two axially outer wall regions being supported upon the wheel rim via annular support elements. The dished annular member is embodied as a split ring that is not closed over its periphery, and is provided with a closure device for closing off the slit. The closure device includes two flanges that extend essentially radially inwardly relative to the rim. The closure device also includes at least one locking clamp for connecting the flanges.

    摘要翻译： 为具有安装在轮辋上的充气轮胎的车轮和轮胎组件提供了紧急支撑构件。 支撑构件被实施为轮胎内的碟形环形构件，并且具有用于在损坏轮胎的情况下支撑轮胎的紧急支撑表面。 环形构件从边缘的中心轴向延伸并对称地延伸其宽度的一部分。 环形构件具有弯曲轮廓，其中两个轴向外壁区域通过环形支撑元件支撑在轮缘上。 碟形环形构件被实施为不在其周边封闭的开口环，并且设置有用于封闭狭缝的封闭装置。 封闭装置包括相对于边缘基本上径向向内延伸的两个凸缘。 闭合装置还包括用于连接凸缘的至少一个锁定夹。

    Method for testing bus connections of writable and readable integrated electronic circuits, in particular memory components
    4.
    发明授权
    Method for testing bus connections of writable and readable integrated electronic circuits, in particular memory components 有权
    用于测试可写和可读集成电子电路，特别是存储器组件的总线连接的方法

    公开(公告)号：US06345372B1

    公开(公告)日：2002-02-05

    申请号：US09547683

    申请日：2000-04-12

    申请人： Andreas Dieckmann ,  Markus Donderer

    发明人： Andreas Dieckmann ,  Markus Donderer

    IPC分类号： G11C2900

    CPC分类号： G11C29/10

    摘要： A method for testing bus connections of electronic circuits, in particular memory components, selects address and data bit test patterns such that, in a first step of write and read steps, respectively, the bits in the address bit test pattern have a first binary value and, in the first step of write steps, the bits in the data bit test pattern have a second value and, for each following step, starting with the lowest-value or highest-value bit, the respective adjacent bit is assigned a binary value which is complementary to that in the preceding step until, in the final step, all the bits in the address or data bit test pattern have a complementary value.

    摘要翻译： 用于测试电子电路，特别是存储器组件的总线连接的方法选择地址和数据位测试模式，使得在写入和读取步骤的第一步骤中，地址位测试模式中的位具有第一二进制值 并且在写步骤的第一步中，数据位测试模式中的位具有第二值，并且对于每个后续步骤，以最低值或最高值位开始，相应的相邻位被分配二进制值 这与前面的步骤是互补的，直到在最后一步中，地址或数据位测试模式中的所有位都具有互补值。