中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

6 records (took 0.013 seconds)

    DRAIN-BALLASTED ELECTROSTATIC DISCHARGE PROTECTION CIRCUITS
    1.
    发明申请
    DRAIN-BALLASTED ELECTROSTATIC DISCHARGE PROTECTION CIRCUITS 有权

    公开(公告)号：US20240372360A1

    公开(公告)日：2024-11-07

    申请号：US18647962

    申请日：2024-04-26

    Applicant: Micron Technology, Inc.

    Inventor： James E. Davis ,  Michael D. Chaine ,  Gregory A. King ,  Liuchun Cai

    IPC: H02H9/04 ,  G11C5/14

    Abstract: An apparatus includes a first voltage domain including a first circuit configured to operate at a first supply voltage, a second voltage domain including second circuit configured to operate at a second supply voltage, and a drain-ballasted electrostatic discharge (ESD) protection circuit configured to electrically couple the first voltage domain and the second voltage domain, the drain-ballasted ESD protection circuit including a first NMOS transistor, a second NMOS transistor, a floating interconnect that electrically couples the first NMOS transistor to the second NMOS transistor, and a grounding resistor coupled to the first NMOS transistor and the second NMOS transistor.

    APPARATUS WITH VOLTAGE PROTECTION MECHANISM
    4.
    发明申请
    APPARATUS WITH VOLTAGE PROTECTION MECHANISM 有权

    公开(公告)号：US20220359495A1

    公开(公告)日：2022-11-10

    申请号：US17871681

    申请日：2022-07-22

    Applicant: Micron Technology, Inc.

    Inventor： James E. Davis ,  Milind Nemchand Furia ,  Michael D. Chaine ,  Eric J. Smith

    IPC: H01L27/02 ,  H01L21/8222

    Abstract: An apparatus includes a protection circuit electrically connected to first and second voltage domains. The protection circuit includes a first silicon-controlled rectifier (SCR) and a second SCR connected in anti-parallel configuration. The first SCR is configured to connect the first voltage domain and the second voltage domain based on detection of a first triggering condition. The second SCR is configured to connect the second voltage domain and the first voltage domain based on detection of a second triggering condition. The protection circuit is configured to isolate the first and second voltage domains without the triggering conditions.

    APPARATUS WITH VOLTAGE PROTECTION MECHANISM
    5.
    发明申请
    APPARATUS WITH VOLTAGE PROTECTION MECHANISM 有权

    公开(公告)号：US20210183851A1

    公开(公告)日：2021-06-17

    申请号：US16712851

    申请日：2019-12-12

    Applicant: Micron Technology, Inc.

    Inventor： James E. Davis ,  Milind Nemchand Furia ,  Michael D. Chaine ,  Eric J. Smith

    IPC: H01L27/02 ,  H01L21/8222

    Abstract: An apparatus includes a protection circuit electrically connected to first and second voltage domains. The protection circuit includes a first silicon-controlled rectifier (SCR) and a second SCR connected in anti-parallel configuration. The first SCR is configured to connect the first voltage domain and the second voltage domain based on detection of a first triggering condition. The second SCR is configured to connect the second voltage domain and the first voltage domain based on detection of a second triggering condition. The protection circuit is configured to isolate the first and second voltage domains without the triggering conditions.

    Combination ESD protection circuits and methods
    6.
    发明授权
    Combination ESD protection circuits and methods 有权
    组合式ESD保护电路及方法

    公开(公告)号：US09209620B2

    公开(公告)日：2015-12-08

    申请号：US14109080

    申请日：2013-12-17

    Applicant: Micron Technology, Inc.

    Inventor： Xiaofeng Fan ,  Michael D. Chaine

    IPC: H02H9/00 ,  H02H9/04 ,  H01L27/06 ,  H01L27/02 ,  H01L27/08

    CPC classification number: H02H9/044 ,  H01L27/0259 ,  H01L27/0262 ,  H01L27/0617 ,  H01L27/0817 ,  H02H9/046

    Abstract: Circuits, integrated circuits, apparatuses, and methods, such as those for protecting circuits against electrostatic discharge events are disclosed. In an example method, a thyristor is triggered to conduct current from a signal node to a reference voltage node using leakage currents provided by a transistor formed in a semiconductor doped well shared with the base of the thyristor. The leakage currents are responsive to a noise event (e.g., electrostatic discharge (ESD) event) at the signal node, and increase the voltage of the semiconductor doped well to forward bias the base and the collector of the thyristor. The triggered thyristor conducts the current resulting from the ESD event to the reference voltage node.

    Abstract translation: 公开了用于保护电路免受静电放电事件的电路，集成电路，装置和方法。 在一个示例性方法中，晶闸管被触发以使用由在晶体管的基极共享的半导体掺杂阱中形成的晶体管提供的漏电流从信号节点传导到参考电压节点。 泄漏电流响应于信号节点处的噪声事件（例如，静电放电（ESD）事件），并且增加半导体掺杂阱的电压以使晶闸管的基极和集电极正向偏置。 触发晶闸管将ESD事件导致的电流导通到参考电压节点。

Patent Agency Ranking