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    CHIP ON FILM PACKAGE
    2.
    发明申请
    CHIP ON FILM PACKAGE 审中-公开

    公开(公告)号：US20180261523A1

    公开(公告)日：2018-09-13

    申请号：US15613275

    申请日：2017-06-05

    Applicant: Novatek Microelectronics Corp.

    Inventor： Wen-Ching Huang ,  Chien-Chen Ko

    IPC: H01L23/373 ,  H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H01L23/367 ,  H01L21/48 ,  B32B9/00 ,  B32B7/12 ,  B32B37/14 ,  B32B37/12

    Abstract: A chip on film package includes a base film, a patterned circuit layer, a solder resist layer, a chip and a graphite sheet. The base film includes a first surface and a mounting region located on the first surface. The patterned circuit layer is disposed on the first surface. The solder resist layer partially covers the patterned circuit layer. The chip is disposed on the mounting region and electrically connected to the patterned circuit layer. The graphite sheet covers at least a part of the solder resist layer, wherein an outer edge of the graphite sheet is substantially aligned with an outer edge of the solder resist layer.

    Chip on film package
    4.
    发明授权
    Chip on film package 有权

    公开(公告)号：US10079194B1

    公开(公告)日：2018-09-18

    申请号：US15613275

    申请日：2017-06-05

    Applicant: Novatek Microelectronics Corp.

    Inventor： Wen-Ching Huang ,  Chien-Chen Ko

    IPC: H01L23/373 ,  H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H01L23/367 ,  H01L21/48 ,  B32B9/00 ,  B32B7/12 ,  B32B37/14 ,  B32B37/12

    Abstract: A chip on film package includes a base film, a patterned circuit layer, a solder resist layer, a chip and a graphite sheet. The base film includes a first surface and a mounting region located on the first surface. The patterned circuit layer is disposed on the first surface. The solder resist layer partially covers the patterned circuit layer. The chip is disposed on the mounting region and electrically connected to the patterned circuit layer. The graphite sheet covers at least a part of the solder resist layer, wherein an outer edge of the graphite sheet is substantially aligned with an outer edge of the solder resist layer.

    Chip on film package
    6.
    发明授权
    Chip on film package 有权

    公开(公告)号：US10236234B2

    公开(公告)日：2019-03-19

    申请号：US15903044

    申请日：2018-02-23

    Applicant: Novatek Microelectronics Corp.

    Inventor： Wen-Ching Huang ,  Chien-Chen Ko

    IPC: H01L23/373 ,  B32B37/12 ,  B32B37/14 ,  B32B7/12 ,  B32B9/00 ,  H01L23/00 ,  H01L21/48 ,  H01L23/367 ,  H01L23/31 ,  H01L23/498

    Abstract: A chip on film package includes a base film, a patterned circuit layer, a solder resist layer, a chip and a graphite sheet. The base film includes a first surface and a mounting region located on the first surface. The patterned circuit layer is disposed on the first surface. The solder resist layer partially covers the patterned circuit layer. The chip is disposed on the mounting region and electrically connected to the patterned circuit layer. The graphite sheet covers at least a part of the solder resist layer, wherein an outer edge of the graphite sheet is substantially aligned with an outer edge of the solder resist layer.

    DESCENDING-TYPE PADS OF SEMICONDUCTOR CHIP
    7.
    发明申请
    DESCENDING-TYPE PADS OF SEMICONDUCTOR CHIP 有权

    公开(公告)号：US20220344292A1

    公开(公告)日：2022-10-27

    申请号：US17727848

    申请日：2022-04-25

    Applicant: Novatek Microelectronics Corp.

    Inventor： Huan-Teng Cheng ,  Huang-Chin Tang ,  Chien-Chen Ko

    IPC: H01L23/00

    Abstract: The disclosure provides a semiconductor chip suit for driving a display panel. The semiconductor chip includes a first pad group and a second pad group. The first pad group and the second pad group are disposed at a first long side of the semiconductor chip. The first distance from the first pad group to the edge of the first long side is different from the second distance from the second pad group to the edge of the first long side. The first pad group and the second pad group belong to a first pad row disposed at the first long side. The first pad group comprises a plurality of pads which are closer to the middle of the first pad row than the second pad group.

    CHIP ON FILM PACKAGE
    8.
    发明申请
    CHIP ON FILM PACKAGE 审中-公开

    公开(公告)号：US20190287931A1

    公开(公告)日：2019-09-19

    申请号：US15922832

    申请日：2018-03-15

    Applicant: Novatek Microelectronics Corp.

    Inventor： Chien-Chen Ko ,  Chiao-Ling Huang

    IPC: H01L23/00 ,  H01L23/29 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

    Abstract: A chip on film package including a base film, a patterned circuit layer, a chip, an underfill portion, and a water resistant layer. The base film includes a first surface and a second surface opposite to the first surface, and the first surface includes a mounting region. The patterned circuit layer is disposed on the first surface. The chip is mounted on the mounting region and electrically connected to the patterned circuit layer. The underfill portion covers a connecting portion where the chip and the pattern circuit layer are connected. The water resistant layer at least coves an outer surface of the underfill, wherein the material of the water resistant layer includes resin and metal particles.

    Chip on film package
    9.
    发明授权
    Chip on film package 有权

    公开(公告)号：US10418305B2

    公开(公告)日：2019-09-17

    申请号：US16261607

    申请日：2019-01-30

    Applicant: Novatek Microelectronics Corp.

    Inventor： Wen-Ching Huang ,  Chien-Chen Ko ,  Ling-Chieh Li

    IPC: H01L23/373 ,  B32B7/12 ,  B32B37/14 ,  H01L23/367 ,  B32B9/00 ,  H01L23/31 ,  H01L23/00 ,  H01L21/48 ,  B32B37/12 ,  H01L23/498

    Abstract: A chip on film package includes a base film, a patterned circuit layer, a chip and a heat dissipation sheet. The base film includes a first surface and a mounting region located on the first surface. The patterned circuit layer is disposed on the first surface. The chip is disposed on the mounting region and electrically connected to the patterned circuit layer. The heat dissipation sheet includes a first adhesive layer disposed over the base film, a second adhesive layer disposed over the first adhesive layer, and a graphite layer disposed between the first adhesive layer and the second adhesive layer, wherein at least one of the first adhesive layer and the second adhesive layer is a double-sided adhesive with carrier, which comprises two adhesives and a carrier disposed between the two adhesives.

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