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1.发明授权公开(公告)号：US12159342B2
公开(公告)日：2024-12-03
申请号：US17749951
申请日：2022-05-20
Applicant: NVIDIA Corporation
Inventor： Gregory Muthler , John Burgess
Abstract: Ray tracing hardware accelerators supporting motion blur and moving/deforming geometry are disclosed. For example, dynamic objects in an acceleration data structure are encoded with temporal and spatial information. The hardware includes circuitry that test ray intersections against moving/deforming geometry by applying such temporal and spatial information. Such circuitry accelerates the visibility sampling of moving geometry, including rigid body motion and object deformation, and its associated moving bounding volumes to a performance similar to that of the visibility sampling of static geometry.
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2.发明授权公开(公告)号：US11373358B2
公开(公告)日：2022-06-28
申请号：US16901847
申请日：2020-06-15
Applicant: NVIDIA Corporation
Inventor： Gregory Muthler , John Burgess
Abstract: Ray tracing hardware accelerators supporting motion blur and moving/deforming geometry are disclosed. For example, dynamic objects in an acceleration data structure are encoded with temporal and spatial information. The hardware includes circuitry that test ray intersections against moving/deforming geometry by applying such temporal and spatial information. Such circuitry accelerates the visibility sampling of moving geometry, including rigid body motion and object deformation, and its associated moving bounding volumes to a performance similar to that of the visibility sampling of static geometry.
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公开(公告)号：US11295508B2
公开(公告)日：2022-04-05
申请号：US16897764
申请日：2020-06-10
Applicant: NVIDIA Corporation
Inventor： Gregory Muthler , John Burgess
Abstract: A bounding volume is used to approximate the space an object occupies. If a more precise understanding beyond an approximation is required, the object itself is then inspected to determine what space it occupies. Often, a simple volume (such as an axis-aligned box) is used as bounding volume to approximate the space occupied by an object. But objects can be arbitrary, complicated shapes. So a simple volume often does not fit the object very well. That causes a lot of space that is not occupied by the object to be included in the approximation of the space being occupied by the object. Hardware-based techniques are disclosed herein, for example, for efficiently using multiple bounding volumes (such as axis-aligned bounding boxes) to represent, in effect, an arbitrarily shaped bounding volume to better fit the object, and for using such arbitrary bounding volumes to improve performance in applications such as ray tracing.
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公开(公告)号：US12190435B2
公开(公告)日：2025-01-07
申请号：US18483762
申请日：2023-10-10
Applicant: NVIDIA Corporation
Inventor： Gregory Muthler , John Burgess
Abstract: Enhanced techniques applicable to a ray tracing hardware accelerator for traversing a hierarchical acceleration structure are disclosed. For example, traversal efficiency is improved by combining programmable traversals based on ray operations with per-node static configurations that modify traversal behavior. The per-node static configurations enable creators of acceleration data structures to optimize for potential traversals without necessarily requiring detailed information about ray characteristics and ray operations used when traversing the acceleration structure. Moreover, by providing for selective exclusion of certain nodes using per-node static configurations, less memory is needed to express an acceleration structure that includes, for example, different geometric levels of details corresponding to a single object.
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公开(公告)号：US12154214B2
公开(公告)日：2024-11-26
申请号：US17941578
申请日：2022-09-09
Applicant: NVIDIA Corporation
Inventor： Gregory Muthler , John Burgess , Magnus Andersson , Timo Viitanen , Levi Oliver
Abstract: An alternate root tree or graph structure for ray and path tracing enables dynamic instancing build time decisions to split any number of geometry acceleration structures in a manner that is developer transparent, nearly memory storage neutral, and traversal efficient. The resulting traversals only need to partially traverse the acceleration structure, which improves efficiency. One example use reduces the number of false positive instance acceleration structure to geometry acceleration structure transitions for many spatially separated instances of the same geometry.
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Patent Agency Ranking
公开(公告)号：US11508112B2
公开(公告)日：2022-11-22
申请号：US16905844
申请日：2020-06-18
Applicant: NVIDIA Corporation
Inventor： Gregory Muthler , John Burgess , Ronald Charles Babich, Jr. , William Parsons Newhall, Jr.
Abstract: Techniques are disclosed for improving the throughput of ray intersection or visibility queries performed by a ray tracing hardware accelerator. Throughput is improved, for example, by releasing allocated resources before ray visibility query results are reported by the hardware accelerator. The allocated resources are released when the ray visibility query results can be stored in a compressed format outside of the allocated resources. When reporting the ray visibility query results, the results are reconstructed based on the results stored in the compressed format. The compressed format storage can be used for ray visibility queries that return no intersections or terminate on any hit ray visibility query. One or more individual components of allocated resources can also be independently deallocated based on the type of data to be returned and/or results of the ray visibility query.
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公开(公告)号：US11450057B2
公开(公告)日：2022-09-20
申请号：US16901023
申请日：2020-06-15
Applicant: NVIDIA Corporation
Inventor： Gregory Muthler , John Burgess , Ian Chi Yan Kwong
Abstract: Enhanced techniques applicable to a ray tracing hardware accelerator for traversing a hierarchical acceleration structure and its underlying primitives are disclosed. For example, traversal speed is improved by grouping processing of primitives sharing at least one feature (e.g., a vertex or an edge) during ray-primitive intersection testing. Grouping the primitives for ray intersection testing can reduce processing (e.g., projections and transformations of primitive vertices and/or determining edge function values) because at least a portion of the processing results related to the shared feature in one primitive can be used in determine whether the ray intersects another primitive(s). Processing triangles sharing an edge can double the culling rate of the triangles in the ray/triangle intersection test without replicating the hardware.
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公开(公告)号：US11380041B2
公开(公告)日：2022-07-05
申请号：US16898980
申请日：2020-06-11
Applicant: NVIDIA Corporation
Inventor： Gregory Muthler , John Burgess
Abstract: Enhanced techniques applicable to a ray tracing hardware accelerator for traversing a hierarchical acceleration structure are disclosed. For example, traversal efficiency is improved by combining programmable traversals based on ray operations with per-node static configurations that modify traversal behavior. The per-node static configurations enable creators of acceleration data structures to optimize for potential traversals without necessarily requiring detailed information about ray characteristics and ray operations used when traversing the acceleration structure. Moreover, by providing for selective exclusion of certain nodes using per-node static configurations, less memory is needed to express an acceleration structure that includes, for example, different geometric levels of details corresponding to a single object.
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公开(公告)号：US12198256B2
公开(公告)日：2025-01-14
申请号：US18509038
申请日：2023-11-14
Applicant: NVIDIA Corporation
Inventor： Gregory Muthler , John Burgess , Ronald Charles Babich, Jr. , William Parsons Newhall, Jr.
Abstract: Techniques are disclosed for improving the throughput of ray intersection or visibility queries performed by a ray tracing hardware accelerator. Throughput is improved, for example, by releasing allocated resources before ray visibility query results are reported by the hardware accelerator. The allocated resources are released when the ray visibility query results can be stored in a compressed format outside of the allocated resources. When reporting the ray visibility query results, the results are reconstructed based on the results stored in the compressed format. The compressed format storage can be used for ray visibility queries that return no intersections or terminate on any hit ray visibility query. One or more individual components of allocated resources can also be independently deallocated based on the type of data to be returned and/or results of the ray visibility query.
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公开(公告)号：US12106423B2
公开(公告)日：2024-10-01
申请号：US17946201
申请日：2022-09-16
Applicant: NVIDIA Corporation
Inventor： Gregory Muthler , John Burgess , Magnus Andersson , Ian Kwong , Edward Biddulph
CPC classification number: G06T15/06 , G06T15/005 , G06T15/30 , G06T2210/12 , G06T2210/21
Abstract: Techniques applicable to a ray tracing hardware accelerator for traversing a hierarchical acceleration structure with reduced false positive ray intersections are disclosed. The reduction of false positives may be based upon one or more of selectively performing a secondary higher precision intersection test for a bounding volume, identifying and culling bounding volumes that degenerate to a point, and parametrically clipping rays that exceed certain configured distance thresholds.
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