公开(公告)号：US10600232B2

公开(公告)日：2020-03-24

申请号：US16022506

申请日：2018-06-28

Applicant: NVIDIA Corporation

Inventor： Tomas Akenine-Moller ,  Robert Toth ,  Magnus Andersson ,  Jim Kjell David Nilsson

IPC: G06T15/06 ,  G06T15/80 ,  G06T15/10 ,  G06T11/00 ,  G06T15/00

Abstract: A texture level of detail (LOD) approximation may be performed utilizing ray differentials and a G-buffer. For example, a scene to be rendered is identified, and a G-buffer of the scene is rendered. Additionally, ray tracing is started for the scene, and during the ray tracing, a ray differential is created by accessing the G-buffer. Further, the created ray differential is appended to a current ray, and the created ray differential is traced.

公开(公告)号：US20190236830A1

公开(公告)日：2019-08-01

申请号：US16010316

申请日：2018-06-15

Applicant: NVIDIA Corporation

Inventor： Tomas Akenine-Moller ,  Robert Toth ,  Magnus Andersson

IPC: G06T15/04 ,  G06T15/06 ,  G06T15/10

Abstract: A method, computer readable medium, and system are disclosed for performing a texture level-of-detail approximation. The method includes the steps of identifying a scene to be rendered, projecting a ray passing through a pixel of a screen space, resulting in a first hit point at a geometry element within the scene, determining a footprint angle of the pixel, determining a curvature measure for the geometry element at the first hit point within the scene, computing a texture level of detail (LOD) approximation for a component of the scene, utilizing the footprint angle of the pixel and the curvature measure for the geometry element, and performing, utilizing a hardware processor, one or more rendering operations for the scene, utilizing the texture LOD approximation.

公开(公告)号：US12106423B2

公开(公告)日：2024-10-01

申请号：US17946201

申请日：2022-09-16

Applicant: NVIDIA Corporation

Inventor： Gregory Muthler ,  John Burgess ,  Magnus Andersson ,  Ian Kwong ,  Edward Biddulph

IPC: G06T15/06 ,  G06T15/00 ,  G06T15/30

CPC classification number: G06T15/06 ,  G06T15/005 ,  G06T15/30 ,  G06T2210/12 ,  G06T2210/21

Abstract: Techniques applicable to a ray tracing hardware accelerator for traversing a hierarchical acceleration structure with reduced false positive ray intersections are disclosed. The reduction of false positives may be based upon one or more of selectively performing a secondary higher precision intersection test for a bounding volume, identifying and culling bounding volumes that degenerate to a point, and parametrically clipping rays that exceed certain configured distance thresholds.

公开(公告)号：US12260486B2

公开(公告)日：2025-03-25

申请号：US17946828

申请日：2022-09-16

Applicant: NVIDIA Corporation

Inventor： John Burgess ,  Gregory Muthler ,  Nikhil Dixit ,  Henry Moreton ,  Yury Uralsky ,  Magnus Andersson ,  Marco Salvi ,  Christoph Kubisch

IPC: G06T15/50 ,  G06T1/60 ,  G06T9/00 ,  G06T15/00 ,  G06T15/06 ,  G06T15/40 ,  G06T17/10 ,  G06T17/20 ,  G06T19/20

Abstract: A Displaced Micro-mesh (DMM) primitive enables high complexity geometry for ray and path tracing while minimizing the associated builder costs and preserving high efficiency. A structured, hierarchical representation implicitly encodes vertex positions of a triangle micro-mesh based on a barycentric grid, and enables microvertex displacements to be encoded efficiently (e.g., as scalars linearly interpolated between minimum and maximum triangle surfaces). The resulting displaced micro-mesh primitive provides a highly compressed representation of a potentially vast number of displaced microtriangles that can be stored in a small amount of space. Improvements in ray tracing hardware permit automatic processing of such primitive for ray-geometry intersection testing by ray tracing circuits without requiring intermediate reporting to a shader.

公开(公告)号：US12249022B2

公开(公告)日：2025-03-11

申请号：US17946515

申请日：2022-09-16

Applicant: NVIDIA Corporation

Inventor： John Burgess ,  Gregory Muthler ,  Nikhil Dixit ,  Henry Moreton ,  Yury Uralsky ,  Magnus Andersson ,  Marco Salvi ,  Christoph Kubisch

IPC: G06T15/06 ,  G06T1/60 ,  G06T9/00 ,  G06T15/40 ,  G06T17/10 ,  G06T17/20 ,  G06T19/20

Abstract: A Displaced Micro-mesh (DMM) primitive enables high complexity geometry for ray and path tracing while minimizing the associated builder costs and preserving high efficiency. A structured, hierarchical representation implicitly encodes vertex positions of a triangle micro-mesh based on a barycentric grid, and enables microvertex displacements to be encoded efficiently (e.g., as scalars linearly interpolated between minimum and maximum triangle surfaces). The resulting displaced micro-mesh primitive provides a highly compressed representation of a potentially vast number of displaced microtriangles that can be stored in a small amount of space. Improvements in ray tracing hardware permit automatic processing of such primitive for ray-geometry intersection testing by ray tracing circuits without requiring intermediate reporting to a shader.

公开(公告)号：US20190236831A1

公开(公告)日：2019-08-01

申请号：US16022506

申请日：2018-06-28

Applicant: NVIDIA Corporation

Inventor： Tomas Akenine-Moller ,  Robert Toth ,  Magnus Andersson ,  Jim Kjell David Nilsson

IPC: G06T15/06 ,  G06T15/80 ,  G06T15/10 ,  G06T11/00

Abstract: A texture level of detail (LOD) approximation may be performed utilizing ray differentials and a G-buffer. For example, a scene to be rendered is identified, and a G-buffer of the scene is rendered. Additionally, ray tracing is started for the scene, and during the ray tracing, a ray differential is created by accessing the G-buffer. Further, the created ray differential is appended to a current ray, and the created ray differential is traced.

公开(公告)号：US12198252B2

公开(公告)日：2025-01-14

申请号：US17946193

申请日：2022-09-16

Applicant: NVIDIA Corporation

Inventor： Gregory Muthler ,  John Burgess ,  Magnus Andersson ,  Ian Kwong ,  Edward Biddulph

IPC: G06T15/06 ,  G06T15/00 ,  G06T15/40

Abstract: Techniques applicable to a ray tracing hardware accelerator for traversing a hierarchical acceleration structure with reduced false positive ray intersections are disclosed. The reduction of false positives may be based upon one or more of selectively performing a secondary higher precision intersection test for a bounding volume, identifying and culling bounding volumes that degenerate to a point, and parametrically clipping rays that exceed certain configured distance thresholds.

公开(公告)号：US12198251B2

公开(公告)日：2025-01-14

申请号：US17946093

申请日：2022-09-16

Applicant: NVIDIA Corporation

Inventor： Gregory Muthler ,  John Burgess ,  Magnus Andersson ,  Ian Kwong ,  Edward Biddulph

IPC: G06T15/06 ,  G06T15/00

Abstract: Techniques applicable to a ray tracing hardware accelerator for traversing a hierarchical acceleration structure with reduced false positive ray intersections are disclosed. The reduction of false positives may be based upon one or more of selectively performing a secondary higher precision intersection test for a bounding volume, identifying and culling bounding volumes that degenerate to a point, and parametrically clipping rays that exceed certain configured distance thresholds.

公开(公告)号：US11282261B2

公开(公告)日：2022-03-22

申请号：US16897745

申请日：2020-06-10

Applicant: NVIDIA Corporation

Inventor： Gregory Muthler ,  John Burgess ,  James Robertson ,  Magnus Andersson

IPC: G06T15/06 ,  G06T15/80 ,  G06T15/08 ,  G06T17/10 ,  G06T1/20 ,  G06F9/50 ,  G06T15/00

Abstract: Enhanced techniques applicable to a ray tracing hardware accelerator for traversing a hierarchical acceleration structure are disclosed. The traversal efficiency of such hardware accelerators are improved, for example, by transforming a ray, in hardware, from the ray's coordinate space to two or more coordinate spaces at respective points in traversing the hierarchical acceleration structure. In one example, the hardware accelerator is configured to transform a ray, received from a processor, from the world space to at least one alternate world space and then to an object space in hardware before a corresponding ray-primitive intersection results are returned to the processor. The techniques disclosed herein facilitate the use of additional coordinate spaces to orient acceleration structures in a manner that more efficiently approximate the space occupied by the underlying primitives being ray-traced.

公开(公告)号：US20190236166A1

公开(公告)日：2019-08-01

申请号：US15881619

申请日：2018-01-26

Applicant: NVIDIA Corporation

Inventor： Tomas Akenine-Moller ,  Robert Toth ,  Magnus Andersson

IPC: G06F17/30 ,  G06T11/00 ,  G06T15/30 ,  G06T1/60 ,  G06T15/00 ,  G06T15/04 ,  G06T15/20 ,  G06T15/80

CPC classification number: G06F16/5862 ,  G06T1/60 ,  G06T11/001 ,  G06T15/005 ,  G06T15/04 ,  G06T15/205 ,  G06T15/30 ,  G06T15/80

Abstract: A method, computer readable medium, and system are disclosed for performing a texture level-of-detail approximation. The method includes the steps of identifying a scene to be rendered, projecting a ray passing through a pixel of a screen space, resulting in a first hit point at a geometry element within the scene, determining a footprint angle of the pixel, determining a curvature measure for the geometry element at the first hit point within the scene, computing a texture level of detail (LOD) approximation for a component of the scene, utilizing the footprint angle of the pixel and the curvature measure for the geometry element, and performing, utilizing a hardware processor, one or more rendering operations for the scene, utilizing the texture LOD approximation.