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1.发明公开公开(公告)号：US20240267056A1
公开(公告)日：2024-08-08
申请号：US18106803
申请日：2023-02-07
Applicant: NXP B.V.
Inventor： Erik Olieman , Alphons Litjes , Robert van Veldhoven
CPC classification number: H03M1/124 , H03M1/0626 , H03M1/08
Abstract: A system and method of analog to digital conversion including an adjustable ADC, FIR filter circuitry, and a noise setting controller. The ADC samples an analog input signal to provide digital samples at a sample rate that is Y times an output rate of output digital values. The FIR filter circuitry includes Y taps with Y corresponding coefficients and is configured to filter the digital samples from the ADC and to provide filtered digital samples at the sample rate. decimation circuitry may be included to decimate the filtered digital samples by Y to provide the output digital values. The noise setting controller provides an adjustment value to the ADC to adjust noise contribution of the digital samples provided by the ADC based on corresponding coefficients of the FIR filter circuitry. The ADC is adjusted to reduce noise contribution of digital samples that correspond with higher FIR filter coefficients.
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公开(公告)号：US12109897B2
公开(公告)日：2024-10-08
申请号：US18193721
申请日：2023-03-31
Applicant: NXP B.V.
Inventor： Alphons Litjes , Hendrik Johannes Bergveld , Alexander Vogt , Cristian Pavao Moreira
IPC: B60L3/04 , B60L3/00 , B60L58/10 , G01S13/931
CPC classification number: B60L3/0007 , B60L3/04 , B60L58/10 , B60L2260/50 , B60Y2306/01 , G01S13/931
Abstract: In an embodiment, there is provided a battery management method for a vehicle comprising a plurality of batteries. According to another embodiment there is a control unit for performing the battery management method. The battery management method comprising detecting an incoming hazard; predicting an impact of the incoming hazard from one or more sensors coupled to the vehicle; determining a course of action to be taken in response to the predicted impact; and controlling one or more batteries of the plurality of batteries according to the determined course of action.
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公开(公告)号：US20230361464A1
公开(公告)日：2023-11-09
申请号：US18310848
申请日：2023-05-02
Applicant: NXP B.V.
Inventor： Alphons Litjes , Alexander Vogt , Cristian Pavao Moreira
CPC classification number: H01Q3/2694 , H01Q3/30
Abstract: Systems and methods are provided for performing both wireless communications and wireless sensing in combination. The systems include at least a first base station having at least one antenna device where the antenna device includes a beamformer control unit that uses a modifiable lookup table to control beam characteristics. The system may send a first set of electromagnetic sensing beams to a first environmental area within a field of view of the at least one antenna device to detect environmental objects within the environmental area. Based on data received by the antenna device, the system may generate a modified lookup table.
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4.发明申请公开(公告)号：US20190158108A1
公开(公告)日：2019-05-23
申请号：US16122637
申请日：2018-09-05
Applicant: NXP B.V.
Inventor： Robert Van Veldhoven , Alphons Litjes , Erik Olieman
Abstract: The present application relates to an EQ circuit, a method of operating it and a system comprising the EQ circuit and an ADC. The EQ circuit has a configurable load section, which is provided for selectively exposing one of a plurality of distinct loads to a reference source connected to a reference voltage signal input of the equalization circuit, and a logic section, which is arranged to accept a state signal from the ADC and to selectively connect one distinct load out of the plurality of distinct loads in response to the state signal. The state signal is indicative of an actual operation state of the ADC.
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公开(公告)号：US10958282B2
公开(公告)日：2021-03-23
申请号：US16813823
申请日：2020-03-10
Applicant: NXP B.V.
Inventor： Erik Olieman , Alphons Litjes , Leon van der Dussen
Abstract: A capacitive sampling circuit comprises: a first-differential-input-terminal, configured to receive a first one of a pair of differential-input-signals; a second-differential-input-terminal, configured to receive the other one of the pair of differential-input-signals; a capacitive-circuit-output-terminal, configured to provide a sampled-output-signal; a plurality of first-sampling-capacitors, each having a first-plate and a second-plate; a plurality of reference-voltage-terminals, each configured to receive a respective reference-voltage; and a first-capacitor-first-plate-switching-block configured to selectively connect the first-plate of each of the plurality of first-sampling-capacitors to either: (i) the first-differential-input-terminal; or (ii) a respective one of the plurality of reference-voltage-terminals; and a first-capacitor-second-plate-switch, configured to selectively connect or disconnect the second-plate of each of the plurality of first-sampling-capacitors to the second-differential-input-terminal.
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Patent Agency Ranking
公开(公告)号：US20200313689A1
公开(公告)日：2020-10-01
申请号：US16813823
申请日：2020-03-10
Applicant: NXP B.V.
Inventor： Erik Olieman , Alphons Litjes , Leon van der Dussen
Abstract: A capacitive sampling circuit comprises: a first-differential-input-terminal, configured to receive a first one of a pair of differential-input-signals; a second-differential-input-terminal, configured to receive the other one of the pair of differential-input-signals; a capacitive-circuit-output-terminal, configured to provide a sampled-output-signal; a plurality of first-sampling-capacitors, each having a first-plate and a second-plate; a plurality of reference-voltage-terminals, each configured to receive a respective reference-voltage; and a first-capacitor-first-plate-switching-block configured to selectively connect the first-plate of each of the plurality of first-sampling-capacitors to either: (i) the first-differential-input-terminal; or (ii) a respective one of the plurality of reference-voltage-terminals; and a first-capacitor-second-plate-switch, configured to selectively connect or disconnect the second-plate of each of the plurality of first-sampling-capacitors to the second-differential-input-terminal.
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公开(公告)号：US10284220B1
公开(公告)日：2019-05-07
申请号：US16122637
申请日：2018-09-05
Applicant: NXP B.V.
Inventor： Robert Van Veldhoven , Alphons Litjes , Erik Olieman
Abstract: The present application relates to an EQ circuit, a method of operating it and a system comprising the EQ circuit and an ADC. The EQ circuit has a configurable load section, which is provided for selectively exposing one of a plurality of distinct loads to a reference source connected to a reference voltage signal input of the equalization circuit, and a logic section, which is arranged to accept a state signal from the ADC and to selectively connect one distinct load out of the plurality of distinct loads in response to the state signal. The state signal is indicative of an actual operation state of the ADC.
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公开(公告)号：US20250141457A1
公开(公告)日：2025-05-01
申请号：US18384823
申请日：2023-10-27
Applicant: NXP B.V.
Inventor： Michael Todd Berens , Alphons Litjes , Erik Olieman
IPC: H03M1/06
Abstract: A SAR ADC includes a DAC, a comparator and SAR circuitry, where the DAC includes MSBs encoded with first capacitors; a mismatch error shaping capacitor coupled to the MSBs; LSBs encoded with second capacitors, where a first switch set couples bottom capacitor plates of the first capacitors and the mismatch error shaping capacitor to receive an analog input voltage, a high reference voltage, or a low reference voltage in response to first DAC feedback control signals, wherein a second switch set couples bottom capacitor plates of the second capacitors to receive the high reference voltage or the low reference voltage in response to second DAC feedback control signals, and wherein the SAR circuitry is configured to feedback a mismatch error value from a previous SAR conversion cycle to the LSBs sub-DAC during a current sampling cycle.
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公开(公告)号：US20240405780A1
公开(公告)日：2024-12-05
申请号：US18205250
申请日：2023-06-02
Applicant: NXP B.V.
Inventor： Alphons Litjes , Erik Olieman
IPC: H03M1/06
Abstract: An analog to digital converter including a digital to analog converter (DAC), a comparator, and a controller. The DAC includes a sample node and a capacitor array controlled by a digital control input. The comparator compares a voltage of the sample node with a reference voltage to generate a comparison value. The controller presets the digital control input, prompts the DAC to sample the input voltage onto the sample node, resets the digital control input, and performs a conversion by successively adjusting the digital control input based on the comparison value to determine a digital output. A preset value is subtracted from the digital output to provide an adjusted digital output. A sample predictor predicts the next sample to determine the preset value used to adjust the sample node within a full scale range after DAC reset.
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公开(公告)号：US20230331090A1
公开(公告)日：2023-10-19
申请号：US18193721
申请日：2023-03-31
Applicant: NXP B.V.
Inventor： Alphons Litjes , Hendrik Johannes Bergveld , Alexander Vogt , Cristian Pavao Moreira
CPC classification number: B60L3/0007 , B60L3/04 , B60L58/10 , G01S13/931
Abstract: In an embodiment, there is provided a battery management method for a vehicle comprising a plurality of batteries. According to another embodiment there is a control unit for performing the battery management method. The battery management method comprising detecting an incoming hazard; predicting an impact of the incoming hazard from one or more sensors coupled to the vehicle; determining a course of action to be taken in response to the predicted impact; and controlling one or more batteries of the plurality of batteries according to the determined course of action.
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