Random sampling for horizontal noise reduction

    公开(公告)号:US10264200B2

    公开(公告)日:2019-04-16

    申请号:US15390292

    申请日:2016-12-23

    Inventor: Robert Johansson

    Abstract: An example apparatus for random sampling for horizontal noise reduction includes readout circuitry coupled to receive image data from an array of pixels, the readout circuitry including a plurality of sample and hold (S&H) circuits coupled to respective ones of a plurality of bitlines to sample and hold the image data in response to a plurality of S&H control signals, each of the plurality of S&H circuits including an S&H capacitor and an S&H switch. The S&H capacitor samples and holds respective image data, and the S&H switch coupled between a respective bitline and the respective S&H capacitor, and further coupled to receive a respective one of the plurality of S&H control signals to open/close the S&H switch, where each of the plurality of S&H switches are opened to decouple their respective S&H capacitors from the respective bitlines at a different time.

    Image sensor failure detection
    3.
    发明授权

    公开(公告)号:US09998700B1

    公开(公告)日:2018-06-12

    申请号:US15369504

    申请日:2016-12-05

    Inventor: Robert Johansson

    CPC classification number: H04N5/378 H04N17/002

    Abstract: A novel image sensor includes error detection circuitry for detecting sequencing errors. In a particular embodiment a pattern is inserted into a captured image and an image processor detects sequencing errors by determining a location of the pattern. In a more particular embodiment, the image sensor includes a pixel array, arranged in columns and rows. A row select signal is encoded as a bitwise signal, and the bitwise signal is decoded by a multi-input AND gate associated with a particular column of the image sensor, based on a relationship between rows and columns of the pixel array. The relationship determines the pattern asserted into the captured image.

    Conversion circuitry for reducing pixel array readout time
    4.
    发明授权
    Conversion circuitry for reducing pixel array readout time 有权
    用于减少像素阵列读出时间的转换电路

    公开(公告)号:US08969774B2

    公开(公告)日:2015-03-03

    申请号:US13728716

    申请日:2012-12-27

    Inventor: Robert Johansson

    CPC classification number: H04N5/378 H03M1/123 H03M1/466

    Abstract: An image sensor includes a pixel array having pixels arranged in rows and columns, a first successive-approximation-register (“SAR”) analog-to-digital-converter (“ADC”), a second SAR ADC, and first and second control circuitry. The first SAR ADC includes a first capacitor array (“FCA”) that shares a first common terminal coupled to a first comparator and coupled to receive first analog pixel signals. The second SAR ADC includes a second capacitor array (“SCA”) that shares a second common terminal selectably coupled to a second comparator and coupled to receive second analog pixel signals. The first and second control modules are coupled to selectably switch bottom plates of the FCA from a low reference voltage to the high reference voltage at a same time as selectably switching bottom plates of the SCA from a high reference voltage to the low reference voltage.

    Abstract translation: 图像传感器包括具有以行和列排列的像素的像素阵列,第一逐次逼近寄存器(“SAR”)模拟数字转换器(“ADC”),第二SAR ADC以及第一和第二控制 电路。 第一SAR ADC包括共享耦合到第一比较器并被耦合以接收第一模拟像素信号的第一公共端的第一电容器阵列(“FCA”)。 第二SAR ADC包括共享第二公共端子的第二电容器阵列(“SCA”),该第二公共端可选择地耦合到第二比较器并被耦合以接收第二模拟像素信号。 第一和第二控制模块耦合到可选择地将FCA的底板从低参考电压切换到高参考电压,同时可选地将SCA的底板从高参考电压切换到低参考电压。

    System and method for sensor failure detection

    公开(公告)号:US08736684B1

    公开(公告)日:2014-05-27

    申请号:US13763498

    申请日:2013-02-08

    CPC classification number: H04N17/002 H04N5/357 H04N5/367

    Abstract: A novel image sensor includes a pixel array, a row control circuit, a test signal injection circuit, a sampling circuit, an image processing circuit, a comparison circuit, and a control circuit. In a particular embodiment, the test signal injection circuit injects test signals into the pixel array, the sampling circuit acquires pixel data from the pixel array, and the comparison circuit compares the pixel data with the test signals. If the pixel data does not correspond to the test signals, the comparison circuit outputs an error signal. Additional comparison circuits are provided to detect defects in the control circuitry of an image sensor.

    Dual conversion gain high dynamic range sensor
    6.
    发明授权
    Dual conversion gain high dynamic range sensor 有权
    双转换增益高动态范围传感器

    公开(公告)号:US09402039B2

    公开(公告)日:2016-07-26

    申请号:US14554787

    申请日:2014-11-26

    CPC classification number: H04N5/3559 H04N5/3594 H04N5/37452

    Abstract: A method of reading out a pixel includes resetting a photodetector of the pixel. Light incident on the photodetector is then integrated for a single exposure of a single image capture. A floating diffusion node of the pixel is then reset. The floating diffusion is set to low conversion gain and a low conversion gain reset signal is sampled from the floating diffusion node. The floating diffusion is set to high conversion gain and a high conversion gain reset signal is sampled from the floating diffusion node. Charge carriers are transferred from the photodetector to the floating diffusion node and a high conversion image signal is then sampled from the floating diffusion node. The floating diffusion is set to low conversion gain. Charge carriers are transferred again from the photodetector to the floating diffusion node and a low conversion image signal is sampled from the floating diffusion node.

    Abstract translation: 读出像素的方法包括复位像素的光电检测器。 然后入射在光电检测器上的光被集成用于单次图像捕获的单次曝光。 然后复位像素的浮动扩散节点。 浮动扩散设置为低转换增益,并且从浮动扩散节点采样低转换增益复位信号。 浮动扩散被设置为高转换增益,并且从浮动扩散节点采样高转换增益复位信号。 电荷载体从光电检测器传送到浮动扩散节点,然后从浮动扩散节点采样高转换图像信号。 浮动扩散设置为低转换增益。 电荷载体从光电检测器再次传输到浮动扩散节点,并且从浮动扩散节点采样低转换图像信号。

    DUAL CONVERSION GAIN HIGH DYNAMIC RANGE SENSOR
    7.
    发明申请
    DUAL CONVERSION GAIN HIGH DYNAMIC RANGE SENSOR 有权
    双转换增益高动态范围传感器

    公开(公告)号:US20150201140A1

    公开(公告)日:2015-07-16

    申请号:US14554787

    申请日:2014-11-26

    CPC classification number: H04N5/3559 H04N5/3594 H04N5/37452

    Abstract: A method of reading out a pixel includes resetting a photodetector of the pixel. Light incident on the photodetector is then integrated for a single exposure of a single image capture. A floating diffusion node of the pixel is then reset. The floating pixel is set to low conversion gain and a low conversion gain reset signal is sampled from the floating diffusion node. The floating diffusion is set to high conversion gain and a high conversion gain reset signal is sampled from the floating diffusion node. Charge carriers are transferred from the photodetector to the floating diffusion node and a high conversion image signal is then sampled from the floating diffusion node. The floating diffusion is set to low conversion gain. Charge carriers are transferred again from the photodetector to the floating diffusion node and a low conversion image signal is sampled from the floating diffusion node.

    Abstract translation: 读出像素的方法包括复位像素的光电检测器。 然后入射在光电检测器上的光被集成用于单次图像捕获的单次曝光。 然后复位像素的浮动扩散节点。 浮动像素被设置为低转换增益,并且从浮动扩散节点采样低转换增益复位信号。 浮动扩散被设置为高转换增益,并且从浮动扩散节点采样高转换增益复位信号。 电荷载体从光电检测器传送到浮动扩散节点,然后从浮动扩散节点采样高转换图像信号。 浮动扩散设置为低转换增益。 电荷载体从光电检测器再次传输到浮动扩散节点,并且从浮动扩散节点采样低转换图像信号。

    Low power static random-access memory

    公开(公告)号:US11626153B2

    公开(公告)日:2023-04-11

    申请号:US17340783

    申请日:2021-06-07

    Inventor: Robert Johansson

    Abstract: A low power SRAM (static RAM) for an image sensor includes a voltage generation circuit for providing a positive supply voltage VP and a negative supply VN, wherein VDD>Vp>Vn>Vgnd; a plurality of memory cells coupled to a respective plurality of column sense lines in a pixel array, the plurality of memory cells receiving differential inputs dp and dn; and a Gray counter coupled to switchably couple VP and VN to the differential inputs dp and dn of the plurality of memory cells. A method of operating an image sensor with a low power SRAM includes acquiring an image by the image sensor; generating VP and VN such that VDD>VP>VN>Vgnd; receiving an output g of a column of pixels at a clock input of a memory cell; and switchably coupling VP and VN to the differential inputs dp and dn of a plurality of memory cells in the SRAM according to a codeword from a Gray counter.

    LOW POWER STATIC RANDOM-ACCESS MEMORY

    公开(公告)号:US20220392512A1

    公开(公告)日:2022-12-08

    申请号:US17340783

    申请日:2021-06-07

    Inventor: Robert Johansson

    Abstract: A low power SRAM (static RAM) for an image sensor includes a voltage generation circuit for providing a positive supply voltage VP and a negative supply VN, wherein VDD>Vp>Vn>Vgnd; a plurality of memory cells coupled to a respective plurality of column sense lines in a pixel array, the plurality of memory cells receiving differential inputs dp and dn; and a Gray counter coupled to switchably couple VP and VN to the differential inputs dp and dn of the plurality of memory cells. A method of operating an image sensor with a low power SRAM includes acquiring an image by the image sensor; generating VP and VN such that VDD>VP>VN>Vgnd; receiving an output g of a column of pixels at a clock input of a memory cell; and switchably coupling VP and VN to the differential inputs dp and dn of a plurality of memory cells in the SRAM according to a codeword from a Gray counter.

    METHOD AND SYSTEM FOR IMPLEMENTING CORRELATED MULTI-SAMPLING WITH IMPROVED ANALOG-TO-DIGITAL CONVERTER LINEARITY
    10.
    发明申请
    METHOD AND SYSTEM FOR IMPLEMENTING CORRELATED MULTI-SAMPLING WITH IMPROVED ANALOG-TO-DIGITAL CONVERTER LINEARITY 有权
    用于实现具有改进的模拟数字转换器线性度的相关多采样的方法和系统

    公开(公告)号:US20160150173A1

    公开(公告)日:2016-05-26

    申请号:US14555062

    申请日:2014-11-26

    Inventor: Robert Johansson

    CPC classification number: H04N5/378 H03M1/0634 H04N5/3575

    Abstract: A method of implementing Correlated Multi-Sampling (CMS) in an image sensor with improved analog-to-digital converter (ADC) linearity starts with an ADC circuitry included in a readout circuitry that generates a plurality of uncorrelated random numbers used as a plurality of ADC pedestals for sampling image data. A Successive Approximation Register (SAR) included in the ADC circuitry stores a different one of the ADC pedestals before each sampling of the image data. The ADC circuitry samples an image data from a row a plurality of times against plurality of ADC pedestals to obtain a plurality of sampled input data. The ADC circuitry converts each of the plurality of sampled input data from analog to digital, which includes performing a binary search using the SAR. Other embodiments are also described.

    Abstract translation: 在具有改进的模数转换器(ADC)线性的图像传感器中实现相关多采样(CMS)的方法从包括在读出电路中的ADC电路开始,该读出电路产生多个不相关的随机数作为多个 用于采样图像数据的ADC基座。 ADC电路中包含的连续近似寄存器(SAR)在每次采样图像数据之前存储不同的ADC基座。 ADC电路对多个ADC基座多次对来自行的图像数据进行采样,以获得多个采样的输入数据。 ADC电路将多个采样输入数据中的每一个从模拟转换为数字,其中包括使用SAR执行二进制搜索。 还描述了其它实施例。

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