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公开(公告)号:US12137295B2
公开(公告)日:2024-11-05
申请号:US18235370
申请日:2023-08-18
Applicant: PixArt Imaging Inc.
Inventor: Ren-Chieh Liu , Yi-Cheng Chiu
IPC: H04N25/767 , H01L27/146
Abstract: There is provided a pixel circuit capable of outputting time difference data or image data, and including a first temporal circuit and a second temporal circuit. The first temporal circuit is used to store detected light energy of a first interval and a second interval as the time difference data. The second temporal circuit is used to store detected light energy of the second interval as the image data. The pixel circuit is used to output a pulse width signal corresponding to the time difference data or the image data in different operating modes.
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公开(公告)号:US12052523B2
公开(公告)日:2024-07-30
申请号:US18202964
申请日:2023-05-29
Applicant: PIXART IMAGING INC.
Inventor: Ren-Chieh Liu , Yi-Cheng Chiu
IPC: H04N25/75 , H04N25/589 , H04N25/767 , H04N25/77 , H04N25/771 , H04N25/78
CPC classification number: H04N25/75 , H04N25/589 , H04N25/767 , H04N25/77 , H04N25/771 , H04N25/78
Abstract: There is provided a pixel circuit capable of outputting time difference data and image data, and including an image circuit and a difference circuit. The image circuit is used to record and output detected light energy of a first interval as the image data. The difference circuit is used to record and output a variation of detected light energy between the first interval and a second interval as the time difference data. The pixel circuit selects to output at least one of the time difference data and the image data.
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公开(公告)号:US11317042B2
公开(公告)日:2022-04-26
申请号:US17183366
申请日:2021-02-24
Applicant: PixArt Imaging Inc.
Inventor: Kuan Tang , Yi-Cheng Chiu , Jui-Te Chiu
IPC: H04N5/355 , H01L27/146 , H04N5/353
Abstract: An image sensor apparatus includes a pixel array having pixel units each including an image sensor cell and a processing circuit. The processing circuit includes a bias transistor, second floating diffusion node, first switch unit, signal transfer capacitor, reset transfer capacitor, second switch unit, and third switch unit. Bias transistor is coupled between first and second floating diffusion nodes and has control terminal coupled to bias voltage. First switch unit is coupled between first and second floating diffusion nodes. Second switch unit is coupled between second floating diffusion node and signal transfer capacitor. Third switch unit is coupled between second floating diffusion node and reset transfer capacitor. Signal transfer capacitor is selectively coupled to second floating diffusion node. Reset transfer capacitor is selectively coupled to second floating diffusion node.
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公开(公告)号:US11265506B1
公开(公告)日:2022-03-01
申请号:US17002755
申请日:2020-08-25
Applicant: PixArt Imaging Inc.
Inventor: Kuan Tang , Yi-Cheng Chiu , Jui-Te Chiu
IPC: H04N5/378 , H04N5/355 , H04N5/3745 , H04N5/369
Abstract: An image sensor apparatus includes a pixel array having pixel units each including an image sensor cell and a processing circuit. The processing circuit includes a bias transistor, second floating diffusion node, first switch unit, signal transfer capacitor, reset transfer capacitor, second switch unit, and third switch unit. Bias transistor is coupled between first and second floating diffusion nodes and has control terminal coupled to bias voltage. First switch unit is coupled between first and second floating diffusion nodes. Second switch unit is coupled between second floating diffusion node and signal transfer capacitor. Third switch unit is coupled between second floating diffusion node and reset transfer capacitor. Signal transfer capacitor is selectively coupled to second floating diffusion node. Reset transfer capacitor is selectively coupled to second floating diffusion node.
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公开(公告)号:US20220070395A1
公开(公告)日:2022-03-03
申请号:US17183366
申请日:2021-02-24
Applicant: PixArt Imaging Inc.
Inventor: Kuan Tang , Yi-Cheng Chiu , Jui-Te Chiu
IPC: H04N5/355 , H04N5/353 , H01L27/146
Abstract: An image sensor apparatus includes a pixel array having pixel units each including an image sensor cell and a processing circuit. The processing circuit includes a bias transistor, second floating diffusion node, first switch unit, signal transfer capacitor, reset transfer capacitor, second switch unit, and third switch unit. Bias transistor is coupled between first and second floating diffusion nodes and has control terminal coupled to bias voltage. First switch unit is coupled between first and second floating diffusion nodes. Second switch unit is coupled between second floating diffusion node and signal transfer capacitor. Third switch unit is coupled between second floating diffusion node and reset transfer capacitor. Signal transfer capacitor is selectively coupled to second floating diffusion node. Reset transfer capacitor is selectively coupled to second floating diffusion node.
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公开(公告)号:US11018170B2
公开(公告)日:2021-05-25
申请号:US16455964
申请日:2019-06-28
Applicant: PIXART IMAGING INC.
Inventor: Kuan Tang , Jui-Te Chiu , Yi-Cheng Chiu , Chia-Chi Kuo , Kai-Chieh Chuang
IPC: H01L27/146
Abstract: An image sensor includes a pair of pixel sharing circuits, a second reset transistor, an amplifier transistor, a readout transistor and a control circuit. The pair of pixel sharing circuits connected to a floating diffusion node, each including a photon device, a first reset transistor, a capture transistor, a holding transistor, a capacitor and a sharing transistor. The control circuit is configured to control the first reset transistor, the first capture transistor, the first holding transistor and the sharing transistor of each of the pair of sharing pixel circuits to be turned on or off.
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公开(公告)号:US10609319B2
公开(公告)日:2020-03-31
申请号:US15830754
申请日:2017-12-04
Applicant: PixArt Imaging Inc.
Inventor: Chia-Chi Kuo , Jui-Te Chiu , Han-Chi Liu , Peng-Sheng Chen , Yi-Cheng Chiu
IPC: H04N5/378 , H04N5/369 , H04N5/3745 , H04N5/374 , H04N5/347
Abstract: An image sensor including a first pixel circuit, a second pixel circuit, a first readout line, a second readout line, a first readout circuit, a second readout circuit and an average switch is provided. The first and second pixel circuits are in two columns of a pixel array. The first readout line transmits pixel data of the first pixel circuit to the first readout circuit. The second readout line transmits pixel data of the second pixel circuit to the second readout circuit. The average switch is arranged between the first and second readout lines and used to electrically connect the first and second readout lines in an average mode to average the pixel data on the first and second readout lines.
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公开(公告)号:US11614359B2
公开(公告)日:2023-03-28
申请号:US17474738
申请日:2021-09-14
Applicant: PixArt Imaging Inc.
Inventor: Kuan Tang , Yi-Cheng Chiu , Chia-Chi Kuo , Jui-Te Chiu , Han-Chi Liu
Abstract: There is provided a circuit to improve the sensing efficiency of pixels that uses the induction effect of a capacitor to duplicate a voltage deviation caused by additional electrons and uses a circuit to cancel out the voltage deviation during reading pixel data thereby improving the sensing efficiency.
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公开(公告)号:US11592330B2
公开(公告)日:2023-02-28
申请号:US17474770
申请日:2021-09-14
Applicant: PixArt Imaging Inc.
Inventor: Kuan Tang , Yi-Cheng Chiu , Chia-Chi Kuo , Jui-Te Chiu , Han-Chi Liu
Abstract: There is provided a circuit to improve the sensing efficiency of pixels that uses the induction effect of a capacitor to duplicate a voltage deviation caused by additional electrons and uses a circuit to cancel out the voltage deviation during reading pixel data thereby improving the sensing efficiency.
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公开(公告)号:US11012653B2
公开(公告)日:2021-05-18
申请号:US16601541
申请日:2019-10-14
Applicant: PixArt Imaging Inc.
Inventor: Chia-Chi Kuo , Jui-Te Chiu , Han-Chi Liu , Wei-Chia Huang , Yi-Cheng Chiu , Kuan Tang
IPC: H04N5/376 , H04N5/372 , H04N5/3745
Abstract: A method of image sensor apparatus includes: providing pixel array having pixel units arranged in M rows and N columns; providing N parallel column readout circuits each being arranged for reading out pixel data of one corresponding column; disposing a horizontal shift register in row direction coupled to the N parallel column readout circuits, to receive a pulse signal and a clock signal, sequentially shift a phase of the pulse signal according to the clock signal, and scan a corresponding column according to the shifted phase of the pulse signal; and using a column select circuit having N latches to receive a power down digital control signal transmitted from a microcontroller wherein the power down digital control signal is used to disable at least one column readout circuit to enable and select a portion of the set of N parallel column readout circuits.
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