公开(公告)号：US11018904B1

公开(公告)日：2021-05-25

申请号：US16729665

申请日：2019-12-30

Applicant: QUALCOMM Incorporated

Inventor： Prince Mathew ,  Ashwin Sethuram ,  Patrick Isakanian

IPC: H04L27/00 ,  H04L25/03 ,  G06F13/16 ,  H04L7/033 ,  H04L7/00 ,  H03H7/30

Abstract: Certain aspects of the present disclosure provide methods and apparatus for equalizing a transmitter circuit for use in high-speed data links, such as in a serializer/deserializer (SerDes) scheme. One example transmitter circuit generally includes at least one driver stage, a first equalization circuit coupled to an output of the transmitter circuit, and a second equalization circuit coupled to an input of the at least one driver stage. One example method of transmitting data generally includes operating a transmit circuit comprising: at least one driver stage, a first equalization circuit coupled to an output of the transmitter circuit, and a second equalization circuit coupled to an input of the at least one driver stage; and selectively enabling at least one of the first equalization circuit or the second equalization circuit.

公开(公告)号：US10707876B1

公开(公告)日：2020-07-07

申请号：US16743915

申请日：2020-01-15

Applicant: QUALCOMM Incorporated

Inventor： Young Uk Yim ,  Jacob Schneider ,  Satish Krishnamoorthy ,  Mohammed Mizanur Rahman ,  Prince Mathew ,  Andrew Tohmc ,  Chang Ki Kwon ,  Ashwin Sethuram ,  Mostafa Naguib Abdulla

IPC: H03K19/17736 ,  H02M3/158 ,  H03K19/173 ,  H03K19/0185

Abstract: A hybrid output driver is disclosed that supports high-voltage signaling and low-voltage signaling. The high-voltage signaling is powered by a high-power supply voltage that is greater than a low-power supply voltage that powers the low-voltage signaling.

公开(公告)号：US12095467B2

公开(公告)日：2024-09-17

申请号：US17974460

申请日：2022-10-26

Applicant: QUALCOMM Incorporated

Inventor： Anand Meruva ,  Jeffrey Mark Hinrichs ,  Prince Mathew

IPC: H03L7/081 ,  H03K5/131 ,  H03K5/134 ,  H03K5/00

CPC classification number: H03L7/0814 ,  H03K5/131 ,  H03K5/134 ,  H03L7/0818 ,  H03K2005/00058

Abstract: A delay buffer includes a delay device having an input, an output, and a current terminal. The delay buffer also includes a current circuit coupled between a rail and the current terminal. The current circuit includes transistors and switches. Each one of the switches is coupled in series with a respective one of the transistors between the rail and the current terminal.

公开(公告)号：US10666263B1

公开(公告)日：2020-05-26

申请号：US16743915

申请日：2020-01-15

Applicant: QUALCOMM Incorporated

Inventor： Young Uk Yim ,  Jacob Schneider ,  Satish Krishnamoorthy ,  Mohammed Mizanur Rahman ,  Prince Mathew ,  Andrew Tohmc ,  Chang Ki Kwon ,  Ashwin Sethuram ,  Mostafa Naguib Abdulla

IPC: H03K19/17736 ,  H02M3/158 ,  H03K19/173 ,  H03K19/0185

Abstract: A hybrid output driver is disclosed that supports high-voltage signaling and low-voltage signaling. The high-voltage signaling is powered by a high-power supply voltage that is greater than a low-power supply voltage that powers the low-voltage signaling.