公开(公告)号：US4622619A

公开(公告)日：1986-11-11

申请号：US711478

申请日：1985-03-13

Applicant: Donald P. Schilling ,  Raymond C. Jodoin ,  Joseph E. Johnston

Inventor： Donald P. Schilling ,  Raymond C. Jodoin ,  Joseph E. Johnston

IPC: H01G4/224 ,  H01G4/228 ,  H05K1/02 ,  H01G9/05 ,  H01G4/10 ,  H01G7/00

CPC classification number: H01G4/228 ,  H01G4/224 ,  H05K1/0231 ,  Y10T29/435

Abstract: A decoupling capacitor and method of manufacture thereof are presented wherein the decoupling capacitor is formed from a lead frame which contains the four leads of the capacitor (two of which are electrically inactive) on a single plane. The use of a lead frame automatically provides the dimensional tolerances necessary for encapsulation molding of the decoupling capacitor. The decoupling capacitor is a hermetically sealed capacitive unit consisting of a multilayer monolithic ceramic capacitor (for higher capacitance values in combination with other desirable properties such as flat capacitance vs. temperature characteristics), active leads bonded to the capacitor and dummy pins for auto-insertion into printed circuit boards.

Abstract translation: 提出了去耦电容器及其制造方法，其中去耦电容器由在单个平面上包含电容器的四个引线（其中两个是电惰性的）的引线框形成。 使用引线框架自动提供去耦电容器封装成型所需的尺寸公差。 去耦电容器是由多层单片陶瓷电容器组成的密封电容单元（用于较高电容值与其他所需性能如平坦电容与温度特性相结合），与电容器连接的有源引脚和用于自动插入的虚拟引脚 印制电路板。

公开(公告)号：US4584627A

公开(公告)日：1986-04-22

申请号：US690117

申请日：1985-01-09

Applicant: Donald P. Schilling ,  Raymond C. Jodoin ,  Joseph E. Johnston

Inventor： Donald P. Schilling ,  Raymond C. Jodoin ,  Joseph E. Johnston

IPC: H01G4/228 ,  H01G4/35 ,  H05K1/02 ,  H05K1/18 ,  H01G9/05 ,  H01G7/00 ,  H05K5/00

CPC classification number: H01G4/228 ,  H01G4/35 ,  H05K1/0231 ,  H05K1/18 ,  H05K2201/10636 ,  H05K2201/10924 ,  Y02P70/611 ,  Y10T29/435

Abstract: A flat decoupling capacitor having incorporated therein a multilayer chip capacitor which provides high capacitance values, local charge storage and noise decoupling for integrated circuits is presented. The decoupling capacitor essentially comprises at least two conductors electrically connected to a multilayer ceramic capacitor chip, all of which are encapsulated by an insulating material. Several embodiments are described having variations in chip dimensions, number of multilayer capacitors, number of conductors and particular structural configuration. A simplified embodiment and method of manufacture thereof is also presented.

Abstract translation: 提出了一种平坦的去耦电容器，其中并入其中提供高电容值，集成电路的局部电荷存储和噪声去耦的多层片状电容器。 去耦电容器基本上包括电连接到多层陶瓷电容器芯片的至少两个导体，所有这些导体都被绝缘材料封装。 描述了具有芯片尺寸，多层电容器数量，导体数量和特定结构配置的变化的几个实施例。 还提出了一种简化的实施例及其制造方法。

公开(公告)号：US4502101A

公开(公告)日：1985-02-26

申请号：US403408

申请日：1982-07-30

Applicant: Raymond C. Jodoin

Inventor： Raymond C. Jodoin

IPC: H01G2/06 ,  H01G4/35 ,  H01G4/40 ,  H04B15/02 ,  H05K1/02 ,  H05K1/18 ,  H05K7/20

CPC classification number: H01G4/35 ,  H01G2/06 ,  H01G4/40 ,  H04B15/02 ,  H05K1/0231 ,  H05K1/18 ,  H05K2201/10515 ,  H05K2201/10651 ,  H05K2201/10689

Abstract: High frequency noise is decoupled from a bus conductor which supplies power to an integrated circuit by insertion of a metallized ceramic chip in the space defined by the two parallel rows of leads extending from the circuit. The ceramic chip is provided with a pair of rectangular leads, connected to respective of the metalized opposite surfaces thereof, which are respectively connected to the power supply leads of the circuit.

公开(公告)号：US4577258A

公开(公告)日：1986-03-18

申请号：US676490

申请日：1984-11-29

Applicant: Raymond C. Jodoin

Inventor： Raymond C. Jodoin

IPC: H01G2/06 ,  H01G4/12 ,  H01G4/40 ,  H04B15/02 ,  H05K1/02 ,  H05K7/20

CPC classification number: H01G2/06 ,  H01G4/12 ,  H01G4/40 ,  H04B15/02 ,  H05K1/0231 ,  H05K2201/10515 ,  H05K2201/10651 ,  H05K2201/10689

Abstract: High frequency noise is decoupled from a bus conductor which supplies power to an integrated circuit by insertion of a metallized ceramic chip in the space defined by the two parallel rows of leads extending from the circuit. The ceramic chip is provided with a pair of rectangular leads, connected to respective of the metalized opposite surfaces thereof, which are respectively connected to the power supply leads of the circuit.

Abstract translation: 高频噪声通过在由从电路延伸的两条平行的引线限定的空间内插入金属化的陶瓷芯片而从向总线电路供电的总线导体解耦。 陶瓷芯片设置有一对矩形引线，其连接到其金属化的相对表面，分别连接到电路的电源引线。

公开(公告)号：US4636918A

公开(公告)日：1987-01-13

申请号：US683344

申请日：1984-12-19

Applicant: Raymond C. Jodoin

Inventor： Raymond C. Jodoin

IPC: H01G2/06 ,  H01G4/12 ,  H01G4/40 ,  H04B15/02 ,  H05K1/02 ,  H05K1/18

CPC classification number: H01G2/06 ,  H01G4/12 ,  H01G4/40 ,  H04B15/02 ,  H05K1/0231 ,  H05K2201/10515 ,  H05K2201/10651 ,  H05K2201/10689 ,  Y10S257/916

Abstract: High frequency noise is decoupled from a bus conductor which supplies power to an integrated circuit by providing a metalized ceramic chip either on top of an integrated circuit or on the back side of a circuit board in direct alignment with an integrated circuit. The ceramic chip is provided with a pair of rectangular leads, connected to respective of the metalized opposite surfaces thereof, which are respectively connected to the power supply leads of the integrated circuit.

Abstract translation: 通过在集成电路的顶部或与集成电路直接对准的电路板的背面上提供金属化的陶瓷芯片，高频噪声与向总线电路供电的总线导体解耦。 陶瓷芯片设置有一对矩形引线，连接到其金属化的相对表面，分别连接到集成电路的电源引线。

公开(公告)号：US4382156A

公开(公告)日：1983-05-03

申请号：US249642

申请日：1981-03-31

Applicant: Raymond C. Jodoin

Inventor： Raymond C. Jodoin

IPC: H02G5/00 ,  H01B5/00

CPC classification number: H02G5/005

Abstract: A method of production of a miniaturized bus bar is presented wherein a layer of unfired ceramic is positioned between a pair of bus bar conductors.

Abstract translation: 提出了一种生产小型化母线的方法，其中未烧成的陶瓷层位于一对母线导体之间。