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1.
公开(公告)号:US20190244948A1
公开(公告)日:2019-08-08
申请号:US16389475
申请日:2019-04-19
发明人: Alberto PAGANI
IPC分类号: H01L27/02 , H01L23/00 , H01L25/10 , H01L21/683 , H01L23/66 , H01L23/48 , H01L23/31 , H05K1/18 , H01L25/065 , H01L21/768
CPC分类号: H01L27/0203 , H01L21/561 , H01L21/568 , H01L21/6835 , H01L21/768 , H01L22/22 , H01L23/3128 , H01L23/48 , H01L23/49833 , H01L23/66 , H01L24/02 , H01L24/05 , H01L24/06 , H01L24/08 , H01L24/09 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/19 , H01L24/20 , H01L24/29 , H01L24/30 , H01L24/32 , H01L24/48 , H01L24/73 , H01L24/94 , H01L24/95 , H01L25/0657 , H01L25/105 , H01L2221/68304 , H01L2221/68327 , H01L2221/6834 , H01L2223/6677 , H01L2224/0231 , H01L2224/02313 , H01L2224/02319 , H01L2224/02321 , H01L2224/02371 , H01L2224/0401 , H01L2224/04105 , H01L2224/05569 , H01L2224/06187 , H01L2224/08137 , H01L2224/08146 , H01L2224/12105 , H01L2224/13024 , H01L2224/14183 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2224/2105 , H01L2224/211 , H01L2224/28105 , H01L2224/29024 , H01L2224/30183 , H01L2224/32145 , H01L2224/32227 , H01L2224/45015 , H01L2224/45099 , H01L2224/48 , H01L2224/48091 , H01L2224/48175 , H01L2224/73207 , H01L2224/73215 , H01L2224/73251 , H01L2224/82106 , H01L2224/94 , H01L2224/95 , H01L2225/06531 , H01L2225/06541 , H01L2225/06555 , H01L2225/06565 , H01L2225/06568 , H01L2225/06572 , H01L2225/06596 , H01L2225/1023 , H01L2225/1064 , H01L2225/107 , H01L2924/00014 , H01L2924/12042 , H01L2924/15159 , H01L2924/207 , H05K1/181 , H05K1/189 , H05K2201/10515 , Y02P70/611 , H01L2224/02 , H01L2224/08 , H01L2224/16 , H01L2224/32 , H01L2224/19 , H01L2924/00
摘要: An electronic system supports superior coupling by implementing a communication mechanism that provides at least for horizontal communication for example, on the basis of wired and/or wireless communication channels, in the system. Hence, by enhancing vertical and horizontal communication capabilities in the electronic system, a reduced overall size may be achieved, while nevertheless reducing complexity in printed circuit boards coupled to the electronic system. In this manner, overall manufacturing costs and reliability of complex electronic systems may be enhanced.
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公开(公告)号:US20190120895A1
公开(公告)日:2019-04-25
申请号:US16120611
申请日:2018-09-04
发明人: Kazuyuki KUBOTA , Tomoki KOBAYASHI
IPC分类号: G01R31/28 , H05K1/18 , H05K1/11 , H05K1/14 , H01R12/71 , H01R33/74 , H01R13/24 , H01R13/639 , H01R33/97 , G01R1/04
CPC分类号: G01R31/2808 , G01R1/0408 , H01L25/105 , H01L2225/1023 , H01L2225/1058 , H01L2924/15311 , H01L2924/15331 , H01R12/714 , H01R13/24 , H01R13/639 , H01R33/74 , H01R33/97 , H01R2201/20 , H05K1/11 , H05K1/144 , H05K1/18 , H05K2201/042 , H05K2201/10515 , H05K2203/162
摘要: A socket has a main body that accommodates a PCBA (Printed Circuit Board Assembly) to be inspected. The PCBA includes a substrate mounted with an electronic component, and terminals protruding from the substrate and having side surfaces exposed at an outer peripheral surface of the substrate, and the terminals are positioned within a cavity or opening of the main body in a state in which the PCBA is accommodated in the cavity or opening. The socket further has probes respectively including a fixed part fixed to the main body, and a movable part movable with respect to the fixed part, and a pressing part to press against the movable part of the probe. The movable part includes a tip end part that moves to a position contactable to the side surface of one terminal within the cavity or opening, when the pressing part presses against the movable part.
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公开(公告)号:US10080293B2
公开(公告)日:2018-09-18
申请号:US15658532
申请日:2017-07-25
发明人: Junji Sato , Katsuya Fukase
IPC分类号: H05K1/16 , H05K1/18 , H01L23/13 , H01L23/498 , H01L21/683 , H01L21/48 , H01L23/00
CPC分类号: H05K1/186 , H01L21/4857 , H01L21/486 , H01L21/6836 , H01L23/13 , H01L23/145 , H01L23/15 , H01L23/49811 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/49838 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/73 , H01L2221/68345 , H01L2221/68359 , H01L2224/13101 , H01L2224/16225 , H01L2224/16227 , H01L2224/2919 , H01L2224/32225 , H01L2224/73204 , H01L2224/92125 , H01L2924/15311 , H01L2924/19041 , H01L2924/19102 , H05K1/181 , H05K3/4644 , H05K2201/10015 , H05K2201/10515 , H05K2201/10522 , H01L2924/014 , H01L2924/00014 , H01L2924/00012
摘要: An electronic component-embedded board includes: a core substrate; a cavity which penetrates the core substrate; a wiring layer formed on one face of the core substrate; a component mounting pattern formed of the same material as the wiring layer and laid across the cavity to partition the cavity into through holes in plan view; an electronic component mounted on the component mounting pattern and arranged inside the cavity; a first insulating layer formed on the one face of the core substrate to cover one face of the electronic component; and a second insulating layer formed on the other face of the core substrate to cover the other face of the electronic component. The cavity is filled with the first insulating layer and the second insulating layer.
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公开(公告)号:US20180242455A1
公开(公告)日:2018-08-23
申请号:US15961859
申请日:2018-04-24
CPC分类号: H05K1/181 , H01L23/3121 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/16 , H01L2224/16265 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48471 , H01L2224/48472 , H01L2224/73257 , H01L2224/73265 , H01L2924/00014 , H01L2924/01033 , H01L2924/01047 , H01L2924/01082 , H01L2924/07802 , H01L2924/14 , H01L2924/1433 , H01L2924/181 , H01L2924/19041 , H01L2924/19103 , H01L2924/19104 , H05K3/284 , H05K3/321 , H05K2201/10166 , H05K2201/10515 , H05K2201/1053 , H05K2201/10636 , Y02P70/611 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: Single-die or multi-die packaged modules that incorporate three-dimensional integration of active devices with discrete passive devices to create a package structure that allows active devices (such as, silicon or gallium-arsenide devices) to share the same footprint area as an array of passive surface mount components. In one example, a module includes at least one active device stacked on top of an array of passive surface mount components on a substrate. A conductive or non-conductive adhesive can be used to adhere the active device to the array of passive devices.
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公开(公告)号:US20180240723A1
公开(公告)日:2018-08-23
申请号:US15958949
申请日:2018-04-20
发明人: Chun-Lin Lu , Kai-Chiang Wu , Yen-Ping Wang , Shih-Wei Liang , Ching-Feng Yang
CPC分类号: H01L23/24 , H01L21/481 , H01L21/4885 , H01L21/563 , H01L23/49816 , H01L23/49827 , H01L24/48 , H01L24/73 , H01L25/105 , H01L2224/16225 , H01L2224/26175 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2224/92125 , H01L2225/1023 , H01L2225/1058 , H01L2924/15311 , H01L2924/15331 , H01L2924/18161 , H05K1/181 , H05K2201/049 , H05K2201/10378 , H05K2201/10515 , H05K2201/10734 , H05K2201/2036 , Y02P70/611 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要: An interposer may comprise a metal layer above a substrate. A dam or a plurality of dams may be formed above the metal layer. A dam surrounds an area of a size larger than a size of a die which may be connected to a contact pad above the metal layer within the area. A dam may comprise a conductive material, or a non-conductive material, or both. An underfill may be formed under the die, above the metal layer, and contained within the area surrounded by the dam, so that no underfill may overflow outside the area surrounded by the dam. Additional package may be placed above the die connected to the interposer to form a package-on-package structure.
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6.
公开(公告)号:US20180236368A1
公开(公告)日:2018-08-23
申请号:US15886884
申请日:2018-02-02
申请人: Yu-Wei CHEN
发明人: Yu-Wei CHEN , Lin-Yu KAO
CPC分类号: A63H33/042 , A63H33/08 , A63H33/086 , G09B23/185 , H02J50/10 , H05K1/115 , H05K1/144 , H05K1/18 , H05K2201/10037 , H05K2201/10151 , H05K2201/10515 , H05K2201/1056
摘要: An electronic building block set with a metal layer on the outer surface of each building block includes a main and an auxiliary building block. The top of the main building block includes plural main hollow posts, each with a main sensing contact, and has a main metal layer on the outer surface. The main sensing contacts and the main metal layer are electrically connected to opposite-polarity main electrode circuits respectively. The bottom of the auxiliary building block includes a first sensing element and has an auxiliary metal layer on the outer surface. The first sensing element and the auxiliary metal layer are electrically connected to opposite-polarity auxiliary electrode circuits respectively. When the building blocks are engaged, the first sensing element is electrically connected to the corresponding main sensing contact, and the auxiliary metal layer, to the main metal layer to enable electricity or signal transmission between the building blocks.
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公开(公告)号:US10039199B2
公开(公告)日:2018-07-31
申请号:US15296813
申请日:2016-10-18
申请人: Amphenol Corporation
CPC分类号: H05K5/0247 , H01R13/6466 , H01R13/6473 , H01R13/6625 , H05K1/0231 , H05K1/181 , H05K3/301 , H05K5/0021 , H05K5/0217 , H05K5/065 , H05K13/00 , H05K2201/10015 , H05K2201/10515
摘要: An adapter has two conductors each with a U-shaped bend forming upper longer legs and lower shorter legs. The conductors face each other with the longer legs linearly aligned with each other and the shorter legs aligned with each other, thereby forming a first gap between the longer legs and a second gap between the shorter legs. The first gap is substantially smaller than the second gap, so that an electrical package can be placed across the first gap to contact the two upper longer legs, while the two shorter legs are spaced further apart to span a larger gap between conductors of a connector. Thus, the adapter enables the electrical package to be connected to conductors having a gap that is larger than the electrical package.
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公开(公告)号:US10008474B2
公开(公告)日:2018-06-26
申请号:US15206729
申请日:2016-07-11
发明人: Thomas J. Brunschwiler , Andreas Christian Doering , Ronald Peter Luijten , Stefano Sergio Oggioni , Patricia Maria Sagmeister , Martin Leo Schmatz
IPC分类号: H01L29/40 , H01L25/065 , H01L23/498 , H01L23/31 , H01L23/00 , H01L23/367
CPC分类号: H01L25/0655 , H01L23/13 , H01L23/3114 , H01L23/36 , H01L23/367 , H01L23/49805 , H01L23/49838 , H01L24/48 , H01L25/105 , H01L2224/48091 , H01L2224/48225 , H01L2924/00014 , H01L2924/153 , H05K1/145 , H05K3/3442 , H05K3/366 , H05K3/403 , H05K2201/10515 , H05K2201/1053 , H05K2201/10727 , H05K2201/10984 , H05K2203/0228 , H05K2203/143 , H01L2224/45099
摘要: Embodiments of the invention are directed to an integrated circuit (IC) package assembly, including: one or more printed circuit boards (PCBs); and a set of chip packages, each including: an overmold; and an IC chip, overmolded in the overmold, and wherein: the chip packages are stacked transversely to an average plane of each of the chip packages, thereby forming a stack wherein a main surface of one of the chip packages faces a main surface of another one of the chip packages; and each of the chip packages is laterally soldered to one or more of said one or more PCBs and arranged transversally to each of said one or more PCBs, whereby an average plane of each of said one or more PCBs extends transversely to the average plane of each of the chip packages of the stack. Further embodiments are directed to related devices and fabrication methods.
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公开(公告)号:US20180168038A1
公开(公告)日:2018-06-14
申请号:US15892740
申请日:2018-02-09
发明人: Ai Kiar Ang , Michael Lauri
IPC分类号: H05K1/11 , H05K3/34 , H05K1/18 , H01L23/495 , H05K1/03 , H01L25/00 , H01L25/10 , H05K3/32 , H05K1/14 , H01L21/48
CPC分类号: H05K1/11 , H01L21/4839 , H01L23/49537 , H01L23/49555 , H01L23/49565 , H01L23/49575 , H01L25/105 , H01L25/50 , H01L2225/1029 , H01L2924/181 , H05K1/0313 , H05K1/144 , H05K1/18 , H05K1/181 , H05K3/328 , H05K3/341 , H05K3/3421 , H05K3/3426 , H05K2201/10015 , H05K2201/10227 , H05K2201/10515 , H05K2201/1053 , H05K2201/10962 , Y02P70/613 , H01L2924/00012
摘要: A method includes forming a multi-stacked electronic device having two or more electronic components, each of the electronic components includes a leadframe, the leadframes of each electronic component are physically joined together using a non-solder metal joining process to form a joint, and the joint is located outside a solder connection region.
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公开(公告)号:US20180153035A1
公开(公告)日:2018-05-31
申请号:US15880155
申请日:2018-01-25
发明人: Ai Kiar Ang , Michael Lauri
IPC分类号: H05K1/11 , H05K3/32 , H05K1/18 , H01L25/10 , H05K3/34 , H01L23/495 , H05K1/03 , H01L21/48 , H01L25/00 , H05K1/14
CPC分类号: H05K1/11 , H01L21/4839 , H01L23/49537 , H01L23/49555 , H01L23/49565 , H01L23/49575 , H01L25/105 , H01L25/50 , H01L2225/1029 , H01L2924/181 , H05K1/0313 , H05K1/144 , H05K1/18 , H05K1/181 , H05K3/328 , H05K3/341 , H05K3/3421 , H05K3/3426 , H05K2201/10015 , H05K2201/10227 , H05K2201/10515 , H05K2201/1053 , H05K2201/10962 , Y02P70/613 , H01L2924/00012
摘要: A method includes forming a multi-stacked electronic device having two or more electronic components, each of the electronic components includes a leadframe, the leadframes of each electronic component are physically joined together using a non-solder metal joining process to form a joint, and the joint is located outside a solder connection region.
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