公开(公告)号：US20160079294A1

公开(公告)日：2016-03-17

申请号：US14948713

申请日：2015-11-23

Applicant: Renesas Electronics Corporation

Inventor： Takahiro TOMIMATSU ,  Takeshi KAMINO ,  Takeshi KAWAMURA

IPC: H01L27/146

CPC classification number: H01L27/14625 ,  H01L27/14612 ,  H01L27/14629 ,  H01L27/14643 ,  H01L27/14685

Abstract: To prevent deterioration in the sensitivity of a pixel part caused by variation in the distance between a waveguide and a photo diode and by decay of light due to suppression of reflection of entering light. In a pixel region, there is formed a waveguide which penetrates through a fourth interlayer insulating film or the like and reaches a sidewall insulating film. The sidewall insulating film is configured to have a stacked structure of a silicon oxide film and a silicon nitride film. The waveguide is formed so as to penetrate through even the silicon nitride film of the sidewall insulating film and to reach the silicon oxide film of the sidewall insulating film, or so as to reach the silicon nitride film of the sidewall.

Abstract translation: 为了防止由于波导和光电二极管之间的距离的变化引起的像素部分的灵敏度的劣化以及由于抑制入射光的反射而导致的光衰减。 在像素区域中，形成穿过第四层间绝缘膜等并到达侧壁绝缘膜的波导。 侧壁绝缘膜被配置为具有氧化硅膜和氮化硅膜的堆叠结构。 波导形成为穿透侧壁绝缘膜的氮化硅膜，并到达侧壁绝缘膜的氧化硅膜，或者到达侧壁的氮化硅膜。

公开(公告)号：US20170084658A1

公开(公告)日：2017-03-23

申请号：US15364456

申请日：2016-11-30

Applicant: Renesas Electronics Corporation

Inventor： Takeshi KAMINO ,  Yotaro GOTO

IPC: H01L27/146

CPC classification number: H01L27/14643 ,  H01L21/265 ,  H01L21/26513 ,  H01L21/26586 ,  H01L21/31116 ,  H01L27/14605 ,  H01L27/14607 ,  H01L27/1461 ,  H01L27/14612 ,  H01L27/14614 ,  H01L27/1462 ,  H01L27/14689 ,  H01L29/66568 ,  H01L29/6659

Abstract: Provided is a semiconductor device with improved performance. The semiconductor device includes a photodiode having a charge storage layer (n-type semiconductor region) and a surface layer (p-type semiconductor region), and a transfer transistor having a gate electrode and a floating diffusion. The surface layer (p-type semiconductor region) of a second conductive type formed over the charge storage layer (n-type semiconductor region) of a first conductive type includes a first sub-region having a low impurity concentration, and a second sub-region having a high impurity concentration. The first sub-region is arranged closer to the floating diffusion than the second sub-region.

公开(公告)号：US20160172419A1

公开(公告)日：2016-06-16

申请号：US15050300

申请日：2016-02-22

Applicant: Renesas Electronics Corporation

Inventor： Takeshi KAMINO

IPC: H01L27/146

CPC classification number: H01L27/14689 ,  H01L27/14612 ,  H01L27/14614 ,  H01L27/14627 ,  H01L27/14643 ,  H01L27/14687

Abstract: The performances of a semiconductor device are improved. A semiconductor device has a photodiode and a transfer transistor formed in a pixel region. Further, the semiconductor device has a second transistor formed in a peripheral circuit region. The transfer transistor includes a first gate electrode, and a film part formed of a thick hard mask film formed over the first gate electrode. The second transistor includes a second gate electrode, source/drain regions, silicide layers formed at the upper surface of the second gate electrode, and the upper surfaces of the source/drain regions.

公开(公告)号：US20170213862A1

公开(公告)日：2017-07-27

申请号：US15365344

申请日：2016-11-30

Applicant: Renesas Electronics Corporation

Inventor： Takeshi KAMINO ,  Yotaro GOTO

IPC: H01L27/146

CPC classification number: H01L27/14605 ,  H01L27/1463 ,  H01L27/14636 ,  H01L27/14643

Abstract: An improvement is achieved in the performance of a semiconductor device. A semiconductor device includes a pixel including a first active region where a photodiode and a transfer transistor are formed and a second active region for supplying a grounding potential. Over a p-type semiconductor region in the second active region, a plug for supplying the grounding potential is disposed. In an n-type semiconductor region for a drain region of the transfer transistor formed in the first active region, a gettering element is introduced. However, in the p-type semiconductor region in the second active region, the gettering element is not introduced.

公开(公告)号：US20140070288A1

公开(公告)日：2014-03-13

申请号：US14024117

申请日：2013-09-11

Applicant: Renesas Electronics Corporation

Inventor： Takahiro TOMIMATSU ,  Takeshi KAMINO ,  Takeshi KAWAMURA

IPC: H01L27/146

CPC classification number: H01L27/14625 ,  H01L27/14612 ,  H01L27/14629 ,  H01L27/14643 ,  H01L27/14685

Abstract: To prevent deterioration in the sensitivity of a pixel part caused by variation in the distance between a waveguide and a photo diode and by decay of light due to suppression of reflection of entering light. In a pixel region, there is formed a waveguide which penetrates through a fourth interlayer insulating film or the like and reaches a sidewall insulating film. The sidewall insulating film is configured to have a stacked structure of a silicon oxide film and a silicon nitride film. The waveguide is formed so as to penetrate through even the silicon nitride film of the sidewall insulating film and to reach the silicon oxide film of the sidewall insulating film, or so as to reach the silicon nitride film of the sidewall.

Abstract translation: 为了防止由于波导和光电二极管之间的距离的变化引起的像素部分的灵敏度的劣化以及由于抑制入射光的反射而导致的光衰减。 在像素区域中，形成穿过第四层间绝缘膜等并到达侧壁绝缘膜的波导。 侧壁绝缘膜被配置为具有氧化硅膜和氮化硅膜的堆叠结构。 波导形成为穿透侧壁绝缘膜的氮化硅膜，并到达侧壁绝缘膜的氧化硅膜，或者到达侧壁的氮化硅膜。

公开(公告)号：US20190273108A1

公开(公告)日：2019-09-05

申请号：US16278941

申请日：2019-02-19

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Hidenori SATO ,  Koji IIZUKA ,  Takeshi KAMINO

IPC: H01L27/146 ,  H01L23/00

Abstract: A hybrid-bonding-type solid-state imaging device is provided that prevents moisture from entering through the bonded interface and other areas. The solid-state imaging device includes a first interconnect structure over a sensor substrate and a second interconnect structure over a logic substrate, and the first and second interconnect structures are bonded together. At the bonded surface between the first and second interconnect structures, bonding pads formed in the first interconnect structure are bonded to bonding pads formed in the second interconnect structure. Eighth layer portions of a first seal ring formed in the first interconnect structure are bonded to eighth layer portions of a second seal ring formed in the second interconnect structure.

公开(公告)号：US20180358394A1

公开(公告)日：2018-12-13

申请号：US15924171

申请日：2018-03-16

Applicant: Renesas Electronics Corporation

Inventor： Takeshi KAMINO ,  Fumitoshi TAKAHASHI ,  Yotaro GOTO

IPC: H01L27/146 ,  H01L29/40

CPC classification number: H01L27/14612 ,  H01L27/14689 ,  H01L29/401

Abstract: In order to improve the performance of a solid-state imaging device, the solid-state imaging device has a pixel including a photoelectric conversion unit and a transfer transistor, and fluorine is introduced to a gate electrode and a drain region (extension region and n+-type semiconductor region) of the transfer transistor included in the pixel.

公开(公告)号：US20150076566A1

公开(公告)日：2015-03-19

申请号：US14481977

申请日：2014-09-10

Applicant: Renesas Electronics Corporation

Inventor： Takeshi KAMINO

IPC: H01L27/146

CPC classification number: H01L27/14689 ,  H01L27/14612 ,  H01L27/14614 ,  H01L27/14627 ,  H01L27/14643 ,  H01L27/14687

Abstract: The performances of a semiconductor device are improved. A semiconductor device has a photodiode and a transfer transistor formed in a pixel region. Further, the semiconductor device has a second transistor formed in a peripheral circuit region. The transfer transistor includes a first gate electrode, and a film part formed of a thick hard mask film formed over the first gate electrode. The second transistor includes a second gate electrode, source/drain regions, silicide layers formed at the upper surface of the second gate electrode, and the upper surfaces of the source/drain regions.

Abstract translation: 提高了半导体器件的性能。 半导体器件具有形成在像素区域中的光电二极管和转移晶体管。 此外，半导体器件具有形成在外围电路区域中的第二晶体管。 转移晶体管包括第一栅电极和由形成在第一栅电极上的厚硬掩模膜形成的膜部分。 第二晶体管包括第二栅电极，源极/漏极区，形成在第二栅电极的上表面处的硅化物层和源极/漏极区的上表面。