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公开(公告)号:US20160189787A1
公开(公告)日:2016-06-30
申请号:US15062546
申请日:2016-03-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Kyeong-Han LEE , Seok-Cheon KWON , Dong-Yang LEE
CPC classification number: G11C16/26 , G11C7/10 , G11C7/1018 , G11C7/1051 , G11C7/106 , G11C7/1066 , G11C7/22 , G11C7/222 , G11C16/08 , G11C16/102 , G11C16/32 , G11C2207/107 , G11C2207/2281
Abstract: A flash memory device including: a memory cell array; a signal generator inputting a first data fetch signal and outputting a second data fetch signal; and an output buffer circuit configured to output data from the memory cell array in sync with rising and falling edges of the second data fetch signal, wherein second data fetch signal is output along with data output from the output buffer circuit.