公开(公告)号：US11063060B2

公开(公告)日：2021-07-13

申请号：US16454499

申请日：2019-06-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Il-Woo Kim ,  Sang-Ho Rha ,  Byoung-Deog Choi ,  Ik-Soo Kim ,  Min-Jae Oh

IPC: H01L21/8234 ,  H01L21/67 ,  H01L27/11582 ,  H01L27/1157 ,  H01L21/28

Abstract: A method of manufacturing a vertical memory device includes forming a first sacrificial layer on a substrate, the first sacrificial layer including a first insulating material, forming a mold including an insulation layer and a second sacrificial layer alternately and repeatedly stacked on the first sacrificial layer, the insulation layer and the second sacrificial layer including second and third insulating materials, respectively, different from the first insulating material, forming a channel through the mold and the first sacrificial layer, forming an opening through the mold and the first sacrificial layer to expose an upper surface of the substrate, removing the first sacrificial layer through the opening to form a first gap, forming a channel connecting pattern to fill the first gap, and replacing the second sacrificial layer with a gate electrode.

公开(公告)号：US11700731B2

公开(公告)日：2023-07-11

申请号：US17347652

申请日：2021-06-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Il-Woo Kim ,  Sang-Ho Rha ,  Byoung-Deog Choi ,  Ik-Soo Kim ,  Min-Jae Oh

IPC: H10B43/27 ,  H01L21/28 ,  H01L21/67 ,  H01L21/8234 ,  H10B43/35

CPC classification number: H10B43/27 ,  H01L21/67178 ,  H01L21/823487 ,  H01L29/40117 ,  H10B43/35 ,  H01L2924/1438

Abstract: A method of manufacturing a vertical memory device includes forming a first sacrificial layer on a substrate, the first sacrificial layer including a first insulating material, forming a mold including an insulation layer and a second sacrificial layer alternately and repeatedly stacked on the first sacrificial layer, the insulation layer and the second sacrificial layer including second and third insulating materials, respectively, different from the first insulating material, forming a channel through the mold and the first sacrificial layer, forming an opening through the mold and the first sacrificial layer to expose an upper surface of the substrate, removing the first sacrificial layer through the opening to form a first gap, forming a channel connecting pattern to fill the first gap, and replacing the second sacrificial layer with a gate electrode.