公开(公告)号：US20250142813A1

公开(公告)日：2025-05-01

申请号：US18648797

申请日：2024-04-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Soo Ho SHIN ,  Ji Hoon CHANG ,  Ga Eun LEE ,  Hyeon-Woo JANG

IPC: H10B12/00 ,  H01L23/528 ,  H01L29/51

Abstract: A semiconductor memory device includes a substrate including a cell area and a peripheral area defined around the cell area, a peripheral gate on the peripheral area and including a peripheral gate conductive film, peripheral wiring lines on the peripheral gate, peripheral wiring capping films respectively in contact with the peripheral wiring lines, wherein each peripheral wiring capping film includes upper and lower surfaces, and a peripheral wiring isolation pattern isolating adjacent peripheral wiring lines, and contacting a sidewall of the peripheral wiring lines, wherein the lower surface of each peripheral wiring capping film faces the substrate and contacts an upper surface of the peripheral wiring extension line, wherein a height from an upper surface of the substrate to the upper surface of each peripheral wiring extension line is smaller than a height from the upper surface of the substrate to an upper surface of the peripheral wiring isolation pattern.

公开(公告)号：US20240306380A1

公开(公告)日：2024-09-12

申请号：US18663550

申请日：2024-05-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyeon-Woo JANG ,  Soo Ho SHIN

IPC: H10B12/00

CPC classification number: H10B12/50 ,  H10B12/0335 ,  H10B12/09 ,  H10B12/315 ,  H10B12/34

Abstract: A semiconductor memory device comprises a substrate which includes a cell region, and a peri region defined around the cell region, the cell region including an active region defined by an element separation film, a storage pad connected to the active region of the cell region, a peri gate structure placed on the substrate of the peri region, a peri contact plug placed on both sides of the peri gate structure and connected to the substrate, a first interlayer insulating film which is placed on the storage pad and the peri contact plug, and includes a nitride-based insulating material, and an information storage unit connected to the storage pad, wherein a thickness of the first interlayer insulating film on an upper surface of the storage pad is smaller than a thickness of the first interlayer insulating film on an upper surface of the peri contact plug.

公开(公告)号：US20240057323A1

公开(公告)日：2024-02-15

申请号：US18492105

申请日：2023-10-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyeon Woo JANG ,  Soo Ho SHIN ,  Dong Sik PARK ,  Jong Min LEE ,  Ji Hoon CHANG

IPC: H10B12/00

CPC classification number: H10B12/485 ,  H10B12/34 ,  H10B12/053 ,  H10B12/315 ,  H10B12/0335 ,  H10B12/482 ,  H10B12/30

Abstract: The present disclosure provides a semiconductor memory device with improved element performance and reliability. The semiconductor memory device includes a substrate, a gate electrode extending in a first direction in the substrate, a plurality of buried contacts on the substrate, and a fence in a trench between adjacent ones of the buried contacts. The fence is on the gate electrode. The fence includes a spacer film on side walls of the trench and extending in a second direction intersecting the first direction, and a filling film in the trench and on the spacer film. An upper surface of the spacer film is lower than an upper surface of the filling film with respect to the substrate.

公开(公告)号：US20230189504A1

公开(公告)日：2023-06-15

申请号：US17953401

申请日：2022-09-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Keon Hee PARK ,  Soo Ho SHIN ,  Hyeon-Woo JANG ,  Dong-Sik PARK ,  Ga Eun LEE

IPC: H01L27/108

CPC classification number: H01L27/10814 ,  H01L27/10823

Abstract: A semiconductor memory device includes a landing pad on a substrate, a lower electrode on and connected to the landing pad, a dielectric layer on and extending along a profile of the lower electrode, an upper electrode on the dielectric layer, and an upper plate electrode on the upper electrode, the upper plate electrode including a first sub-plate electrode and a second sub-plate electrode doped with boron, a first concentration of the boron in the first sub-plate electrode being greater than a second concentration of the boron in the second sub-plate electrode.

公开(公告)号：US20220262803A1

公开(公告)日：2022-08-18

申请号：US17493671

申请日：2021-10-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyeon Woo JANG ,  Soo Ho SHIN ,  Dong Sik PARK ,  Jong Min LEE ,  Ji Hoon CHANG

IPC: H01L27/108

Abstract: The present disclosure provides a semiconductor memory device with improved element performance and reliability. The semiconductor memory device comprises a substrate, a gate electrode extending in a first direction in the substrate, a plurality of buried contacts on the substrate, and a fence in a trench between adjacent ones of the buried contacts. The fence is on the gate electrode. The fence includes a spacer film on side walls of the trench and extending in a second direction intersecting the first direction, and a filling film in the trench and on the spacer film. An upper surface of the spacer film is lower than an upper surface of the filling film with respect to the substrate.

公开(公告)号：US20220189966A1

公开(公告)日：2022-06-16

申请号：US17368130

申请日：2021-07-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyeon-Woo JANG ,  Soo Ho SHIN

IPC: H01L27/108

Abstract: A semiconductor memory device comprises a substrate which includes a cell region, and a peri region defined around the cell region, the cell region including an active region defined by an element separation film, a storage pad connected to the active region of the cell region, a peri gate structure placed on the substrate of the peri region, a peri contact plug placed on both sides of the peri gate structure and connected to the substrate, a first interlayer insulating film which is placed on the storage pad and the pen contact plug, and includes a nitride-based insulating material, and an information storage unit connected to the storage pad, wherein a thickness of the first interlayer insulating film on an upper surface of the storage pad is smaller than a thickness of the first interlayer insulating film on an upper surface of the peri contact plug.