公开(公告)号：US10817640B2

公开(公告)日：2020-10-27

申请号：US16420721

申请日：2019-05-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae-Hoon Kim ,  Yong-Durk Kim ,  Woo-Tae Kim ,  Hyung-Ock Kim ,  Joon-Young Shin

IPC: G06F30/392 ,  G06F30/394 ,  G06F119/18

Abstract: A method of generating an integrated circuit design includes receiving input data defining input cells of the integrated circuit design, selecting first standard cells from a first standard cell library to represent the input cells having a first characteristic, selecting second standard cells from a second standard cell library to represent the input cells having a second characteristic different from the first characteristic, and generating output data representing the integrated circuit design by performing placement and routing on the selected first standard cells and the selected second standard cells. The first standard cell library includes a first type of standard cells manufactured using a first diffusion break scheme. The second standard cell library includes a second type of standard cells manufactured using a second diffusion break scheme. Each of the second type of standard cells has a same function as a respective one of the first type of standard cells.

公开(公告)号：US10817637B2

公开(公告)日：2020-10-27

申请号：US15643472

申请日：2017-07-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Naya Ha ,  Yong-Durk Kim ,  Bong-hyun Lee ,  Hyung-ock Kim ,  Kwang-ok Jeong ,  Jae-hoon Kim

IPC: G06F30/392 ,  G06F30/394 ,  G06F30/398 ,  G06F119/06 ,  G06F119/10 ,  G06F119/12 ,  G06F119/18

Abstract: A system and method of designing an integrated circuit (IC) by considering a local layout effect are provided. The method of designing an IC may place instances of pre-placement cells so as to decrease occurrence of a local layout effect (LLE) causing structure. The method may extract a context of an instance from a peripheral layout of each of the placed instances to estimate an LLE of the instance, thereby analyzing a performance of the IC.