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1.发明申请公开(公告)号：US20190123262A1
公开(公告)日：2019-04-25
申请号：US15993862
申请日：2018-05-31
Applicant: Samsung Electronics Co., Ltd.
Inventor： Joon-myoung Lee , Jae-hoon Kim , Yong-sung Park , Se-chung Oh , Jun-ho Jeong
Abstract: Provided is a semiconductor manufacturing apparatus including a transfer chamber, a first process chamber connected to the transfer chamber, and a second process chamber connected to the transfer chamber. The transfer chamber may be configured to transfer a substrate. The first process chamber may be configured to perform a first oxidation process for oxidizing a metal layer on the substrate at a first temperature. The second process chamber may be configured to perform a second oxidation process for oxidizing a metal layer on the substrate at a second temperature higher than the first temperature.
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公开(公告)号：US10928442B2
公开(公告)日：2021-02-23
申请号：US15842184
申请日：2017-12-14
Applicant: Samsung Electronics Co., Ltd.
Inventor： Tae-il Kim , Jae-hoon Kim , Hyung-ock Kim , Jung-yun Choi
IPC: G01R31/28 , G06F30/34 , G06F30/327 , G06F30/392 , G06F30/398 , G06F30/394 , G06F119/12
Abstract: Computer implemented methods of designing integrated circuits and computing systems are provided. A computer implemented method of designing an integrated circuit according to the inventive concepts may be performed by a processor and may include performing a placement and routing (P&R) operation for standard cells defining the integrated circuit, extracting characteristic values from a result of the P&R operation, generating a physical-aware annotation file by determining a plurality of representative characteristic values that respectively correspond to a plurality of groups based on the extracted characteristic values, and performing a physical-aware synthesis operation to generate a netlist from input data for the integrated circuit, based on the generated physical-aware annotation file.
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公开(公告)号：US10817637B2
公开(公告)日：2020-10-27
申请号：US15643472
申请日：2017-07-07
Applicant: Samsung Electronics Co., Ltd.
Inventor： Naya Ha , Yong-Durk Kim , Bong-hyun Lee , Hyung-ock Kim , Kwang-ok Jeong , Jae-hoon Kim
IPC: G06F30/392 , G06F30/394 , G06F30/398 , G06F119/06 , G06F119/10 , G06F119/12 , G06F119/18
Abstract: A system and method of designing an integrated circuit (IC) by considering a local layout effect are provided. The method of designing an IC may place instances of pre-placement cells so as to decrease occurrence of a local layout effect (LLE) causing structure. The method may extract a context of an instance from a peripheral layout of each of the placed instances to estimate an LLE of the instance, thereby analyzing a performance of the IC.
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Patent Agency Ranking
公开(公告)号：US20190080948A1
公开(公告)日：2019-03-14
申请号：US15924978
申请日：2018-03-19
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jun-soo Lee , Jae-hoon Kim , Kyung-hak Min
IPC: H01L21/68 , H01L21/67 , H01L21/683 , H01L21/687 , H01L21/3065 , H01J37/32
Abstract: The inventive concept provides a method of manufacturing a semiconductor device using a plasma etching apparatus including an alignment chamber and a process chamber. The method includes: loading a wafer in the alignment chamber of the plasma etching apparatus; rotating the wafer loaded in the alignment chamber according to a plurality of heating zones arranged in an electrostatic chuck of the process chamber, thereby rotating a reference point of the wafer; transferring the wafer that was rotated in the alignment chamber onto the electrostatic chuck of the process chamber; and plasma-etching the wafer that was rotated in the alignment chamber on the electrostatic chuck of the process chamber.
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5.发明申请公开(公告)号：US20180231604A1
公开(公告)日：2018-08-16
申请号：US15842184
申请日：2017-12-14
Applicant: Samsung Electronics Co., Ltd.
Inventor： Tae-il Kim , Jae-hoon Kim , Hyung-ock Kim , Jung-yun Choi
CPC classification number: G01R31/2851 , G06F17/505 , G06F17/5054 , G06F17/5072 , G06F17/5077 , G06F17/5081 , G06F2217/84
Abstract: Computer implemented methods of designing integrated circuits and computing systems are provided. A computer implemented method of designing an integrated circuit according to the inventive concepts may be performed by a processor and may include performing a placement and routing (P&R) operation for standard cells defining the integrated circuit, extracting characteristic values from a result of the P&R operation, generating a physical-aware annotation file by determining a plurality of representative characteristic values that respectively correspond to a plurality of groups based on the extracted characteristic values, and performing a physical-aware synthesis operation to generate a netlist from input data for the integrated circuit, based on the generated physical-aware annotation file.
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公开(公告)号：US09231985B2
公开(公告)日：2016-01-05
申请号：US14036903
申请日：2013-09-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Bae-eun Jung , Myung-jin Eom , Byoung-joon Lee , Myeong-wuk Jang , Jae-hoon Kim , Jae-sung Park , Young-il Park
CPC classification number: H04L65/1069 , H04L65/4084 , H04L65/80 , H04L67/2842
Abstract: A method of controlling a router to transmit Content-Centric Network (CCN)-based real-time contents is provided. The method includes receiving identification information regarding real-time contents that a target device is to receive from a source device and transmitting the real-time contents to the target device, and in response to content request information which is generated based on the identification information being received from the target device, transmitting to the target device contents which correspond to the received request information.
Abstract translation: 提供了一种控制路由器传输基于内容中心网络（CCN）的实时内容的方法。 该方法包括从源设备接收关于目标设备要接收的实时内容的识别信息，并将该实时内容发送到目标设备，并且响应于基于该识别信息生成的内容请求信息 从所述目标设备接收到的，向所述目标设备发送与所接收的请求信息相对应的内容。
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公开(公告)号：US10509681B2
公开(公告)日：2019-12-17
申请号：US15812299
申请日：2017-11-14
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jae-hoon Kim , Ju-hyun Kim , Min-seok Kim
Abstract: A resource management method of an electronic apparatus according to an example embodiment includes storing resource information including at least one resource category for assorting hardware resources and software resources by type and an attribute category indicating attribute information of resources included in the at least one resource category in a memory of the electronic apparatus, and in response to an application requesting a specific resource, allocating the specific resource to the application based on the resource information.
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公开(公告)号：US10290527B2
公开(公告)日：2019-05-14
申请号：US15924978
申请日：2018-03-19
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jun-soo Lee , Jae-hoon Kim , Kyung-hak Min
IPC: H01L21/68 , H01L21/67 , H01L21/683 , H01L21/3065 , H01J37/32 , H01L21/687
Abstract: The inventive concept provides a method of manufacturing a semiconductor device using a plasma etching apparatus including an alignment chamber and a process chamber. The method includes: loading a wafer in the alignment chamber of the plasma etching apparatus; rotating the wafer loaded in the alignment chamber according to a plurality of heating zones arranged in an electrostatic chuck of the process chamber, thereby rotating a reference point of the wafer; transferring the wafer that was rotated in the alignment chamber onto the electrostatic chuck of the process chamber; and plasma-etching the wafer that was rotated in the alignment chamber on the electrostatic chuck of the process chamber.
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