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    ENCODER AND METHOD FOR ENCODING THEREOF
    1.
    发明申请
    ENCODER AND METHOD FOR ENCODING THEREOF 有权
    编码器及其编码方法

    公开(公告)号：US20150254476A1

    公开(公告)日：2015-09-10

    申请号：US14577608

    申请日：2014-12-19

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Yong Ki LEE ,  Yun-Ho YOUM ,  Hong-Mook CHOI ,  Jinsu HYUN ,  KeeMoon CHUN

    IPC: G06F21/72

    CPC classification number: G06F21/72 ,  G06F21/556 ,  G09C1/00 ,  H04L9/003 ,  H04L2209/34

    Abstract: A method of encoding and an encoder are provided. The method includes generating first one-hot bits for most significant bits (MSBs) and second one-hot bits for least significant bits (LSBs) using input one-hot bits; encoding the first one-hot bits to the MSBs and complementary MSBs through a first logical operation using a cross-connection; and encoding the second one-hot bits to the LSBs and complementary LSBs through a second logical operation using a cross-connection. The encoder includes a first bit generator, a first encoder, a second bit generator and a second encoder.

    Abstract translation: 提供了一种编码方法和编码器。 该方法包括使用输入单热位产生用于最高有效位（MSB）的第一单热位和用于最低有效位（LSB）的第一单热位; 通过使用交叉连接的第一逻辑运算将第一单热比特编码到MSB和互补MSB; 以及通过使用交叉连接的第二逻辑运算将第二单热比特编码到LSB和互补LSB。 编码器包括第一位发生器，第一编码器，第二位发生器和第二编码器。

    SECURITY DEVICES, ELECTRONIC DEVICES AND METHODS OF OPERATING ELECTRONIC DEVICES
    3.
    发明申请
    SECURITY DEVICES, ELECTRONIC DEVICES AND METHODS OF OPERATING ELECTRONIC DEVICES 审中-公开

    公开(公告)号：US20190042765A1

    公开(公告)日：2019-02-07

    申请号：US16023401

    申请日：2018-06-29

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Young-Jin CHUNG ,  Jae-Chul PARK ,  Ki-Seok BAE ,  Jong-Hoon SHIN ,  Yun-Ho YOUM ,  Hye-Soo LEE ,  Hong-Mook CHOI ,  Jin-Su HYUN

    IPC: G06F21/60 ,  G06F21/78 ,  G06F21/85 ,  G06F21/57 ,  H04L9/06

    Abstract: A security device includes a secure processor, a mail box, a cryptographic intellectual property (IP), a secure direct memory access (DMA) circuit, and an internal memory. The secure processor provides an isolated execution environment. The mail box transfers a request from a CPU to the secure processor. The cryptographic IP performs one or more secure operations, including a signature certification operation, an encryption/decryption operation, and an integrity verification operation, on secure data within the isolated execution environment and without intervention of the CPU. The secure DMA circuit controls the one or more secure operations within the isolated execution environment, wherein only the secure processor is configured to control the secure DMA circuit. The internal memory stores the secure data on which the one or more secure operations are performed. The cryptographic IP includes a DMA circuit configured to control data access to an external storage.

    ELECTRONIC SYSTEM HAVING INTEGRITY VERIFICATION DEVICE
    4.
    发明申请
    ELECTRONIC SYSTEM HAVING INTEGRITY VERIFICATION DEVICE 审中-公开

    公开(公告)号：US20170308703A1

    公开(公告)日：2017-10-26

    申请号：US15636814

    申请日：2017-06-29

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Tong-Pyo HONG ,  Kyung-Ae KIM ,  Jae-Chul PARK ,  Yun-Ho YOUM ,  Heon-Soo LEE ,  Hye-Soo LEE

    IPC: G06F21/57 ,  G06F21/64 ,  G06F21/79

    CPC classification number: G06F21/57 ,  G06F21/64 ,  G06F21/79 ,  G06F2221/034 ,  G06F2221/2139

    Abstract: Provided are an electronic system, an integrity verification device, and a method of performing an integrity verification operation. The electronic system includes: a memory device; a processor configured to provide a plurality of configuration records corresponding to a plurality of verification data stored in the memory device, each of the configuration records including a start address, a data length, and a reference hash value for a corresponding verification data; and an integrity verification device configured to: store the configuration records, select a configuration record, directly access the memory device to read verification data, corresponding to the selected configuration record, based on the start address and the data length included in the selected configuration record, perform a hash operation on the verification data to obtain a verification hash value, and output an interrupt signal based on the verification hash value and the reference hash value comprised in the selected configuration record.

    GLITCH DETECTOR, ELECTRONIC DEVICE HAVING THE SAME, AND ALARM SIGNAL GENERATION METHOD THEREOF
    5.
    发明申请
    GLITCH DETECTOR, ELECTRONIC DEVICE HAVING THE SAME, AND ALARM SIGNAL GENERATION METHOD THEREOF 审中-公开
    玻璃检测器，具有该检测器的电子设备及其报警信号产生方法

    公开(公告)号：US20170032125A1

    公开(公告)日：2017-02-02

    申请号：US15198636

    申请日：2016-06-30

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Heonsoo LEE ,  Hyesoo LEE ,  Yun-Ho YOUM

    IPC: G06F21/57 ,  G06F1/24 ,  G06F21/77 ,  G08B21/18

    CPC classification number: G06F21/57 ,  G06F1/28 ,  G06F21/77 ,  G06F2221/034 ,  G06F2221/2101 ,  G08B21/18 ,  G08B21/182

    Abstract: A glitch detector, an electronic device including the glitch detector, and a method of generating an alarm signal are provided. The glitch detector includes a clock generator configured to generate a clock corresponding to a power voltage, a counter configured to count the clock generated by the clock generator and to output a count value, and a comparator configured to compare a reference value with the count value output by the counter and to generate an alarm signal based on a result of the comparison.

    Abstract translation: 提供了一种毛刺检测器，包括毛刺检测器的电子设备和产生警报信号的方法。 毛刺检测器包括：时钟发生器，被配置为产生对应于电源电压的时钟;配置为对时钟发生器产生的时钟进行计数并输出计数值的计数器;以及比较器，被配置为将参考值与计数值进行比较 由计数器输出，并根据比较结果生成报警信号。

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