公开(公告)号：US20240304237A1

公开(公告)日：2024-09-12

申请号：US18583574

申请日：2024-02-21

Applicant: STMICROELECTRONICS (ROUSSET) SAS

Inventor： Christophe GONCALVES ,  Marc BATTISTA ,  Francois TAILLIET

IPC: G11C11/4091 ,  G11C11/4096 ,  G11C11/4099

CPC classification number: G11C11/4091 ,  G11C11/4096 ,  G11C11/4099

Abstract: The present disclosure relates to a memory device including a sense amplifier, wherein the amplifier comprises a first inverter, wherein an input and an output of the inverter are coupled to a first transistor configured to be switched on during a step of pre-charging of a memory cell.

公开(公告)号：US20200035293A1

公开(公告)日：2020-01-30

申请号：US16043497

申请日：2018-07-24

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Francois TAILLIET ,  Marc BATTISTA

IPC: G11C11/419 ,  G11C11/4096 ,  G11C11/418 ,  G11C8/12 ,  G11C7/22

Abstract: Disclosed herein is a method of performing a non-volatile write to a memory containing a plurality of volatile memory cells grouped into words, with each volatile memory cell having at least one non-volatile memory cell associated therewith. The method includes steps of a) receiving a non-volatile write instruction including at least one address and at least one data word to be written to that at least one address, b) writing the at least one data word to the volatile memory cells of a word at the at least one address, and c) writing data from the volatile memory cells written to during step b) to the non-volatile memory cells associated to those volatile memory cells by individually addressing those non-volatile memory cells for non-volatile writing, but not writing data from other volatile memory cells to their associated non-volatile memory cells because those non-volatile memory cells are not addressed.

公开(公告)号：US20240304224A1

公开(公告)日：2024-09-12

申请号：US18583568

申请日：2024-02-21

Applicant: STMICROELECTRONICS (ROUSSET) SAS

Inventor： Christophe GONCALVES ,  Marc BATTISTA ,  Francois TAILLIET

IPC: G11C7/08 ,  G11C7/10

CPC classification number: G11C7/08 ,  G11C7/1048 ,  G11C7/1069

Abstract: The present disclosure relates to a method of reading a word in a memory device, wherein the word is comprised in a first set of words that can be read by the memory device, each word of the first set comprising at least one byte of data, each word being contained in memory cells, the method comprising a pre-charging step during which the first set and at least a second set of words are pre-charged, a first terminal of each cell of the first and second sets being floating during the pre-charging step.

公开(公告)号：US20200035303A1

公开(公告)日：2020-01-30

申请号：US16043425

申请日：2018-07-24

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Francois TAILLIET ,  Marc BATTISTA

IPC: G11C14/00 ,  G11C8/10 ,  G11C7/06 ,  G11C11/419

Abstract: Disclosed herein is a method of operating a non-volatile static random access NVSRAM memory formed from words. Each word includes NVSRAM cells, each of those NVSRAM cells having an SRAM cell and an electronically erasable programmable read only memory EEPROM cell. If the SRAM cells of a word have been accessed since powerup, data is read from the NVSRAM cells of that word through the SRAM cells. However, if the SRAM cells of that word have not been written since powerup, data is read from the NVSRAM cells of that word through the EEPROM cells.