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公开(公告)号:US10771075B2
公开(公告)日:2020-09-08
申请号:US16422416
申请日:2019-05-24
Applicant: STMicroelectronics S.r.l.
Inventor: Manuela La Rosa , Giovanni Sicurella
Abstract: A converter circuit is used to selectively convert an analog input voltage into a digital output signal or a digital input signal into an analog output voltage as a function of a mode signal. The converter circuit includes a control circuit configured to generate a start-of-conversion signal. A ramp generator is configured to, when the mode signal indicates an analog-to-digital conversion, generate a timer stop signal after a time interval that is determined as a function of the value of the analog input voltage, thereby implementing an analog-to-time conversion. When the mode signal indicates a digital-to-analog conversion, ramp generator is configured to vary the ramp signal until a ramp stop signal is set and, in response to the ramp stop signal, determine the analog output voltage as a function of the ramp signal, thereby implementing a time-to-analog conversion.
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公开(公告)号:US09729058B2
公开(公告)日:2017-08-08
申请号:US15157554
申请日:2016-05-18
Applicant: STMicroelectronics S.r.l.
Inventor: Manuela Larosa , Giovanni Sicurella , Giuseppe Platania
CPC classification number: H02M3/158 , H02M3/156 , H02M2001/0025
Abstract: A boost-type converter circuit includes a pair of converter switches that are alternatively switchable on and off. An inductor is coupled to the intermediate point between the converter switches. A driver module controls switching on and off of the converter switches in respond to a comparator output signal. A reference signal line provides to the comparator a reference signal, and an output feedback line provides to the comparator an output feedback signal. These signals are compared to each other to generate the comparator output signal for controlling the driver module. A low-pass filter network is coupled to the inductor and configured to provide a ripple current which is a low-pass filtered replica of the current through the inductor. An injector circuit injects the ripple current into the reference signal line coupled to the comparator.
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公开(公告)号:US20230034912A1
公开(公告)日:2023-02-02
申请号:US17387296
申请日:2021-07-28
Applicant: STMicroelectronics S.r.l.
Inventor: Alessandro Nicolosi , Giovanni Sicurella
Abstract: A method to operate a DC-DC power converter in a low power burst mode, the method including sampling an output voltage of the DC-DC power converter with a sampling frequency to determine when to initiate a burst for the low power burst mode; and adapting the sampling frequency based on the output voltage.
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公开(公告)号:US09719874B2
公开(公告)日:2017-08-01
申请号:US14754788
申请日:2015-06-30
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Alessandro Motta , Alberto Pagani , Giovanni Sicurella
CPC classification number: G01L9/0052 , G01L9/065
Abstract: A pressure sensor device is to be positioned within a material where a mechanical parameter is measured. The pressure sensor device may include an IC having a ring oscillator with an inverter stage having first doped and second doped piezoresistor couples. Each piezoresistor couple may include two piezoresistors arranged orthogonal to one another with a same resistance value. Each piezoresistor couple may have first and second resistance values responsive to pressure. The IC may include an output interface coupled to the ring oscillator and configured to generate a pressure output signal based upon the first and second resistance values and indicative of pressure normal to the IC.
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公开(公告)号:US12218594B2
公开(公告)日:2025-02-04
申请号:US16988379
申请日:2020-08-07
Applicant: STMicroelectronics S.r.l.
Inventor: Manuela La Rosa , Giovanni Sicurella
Abstract: A control circuit and method, wherein an error signal is generated representative of a difference between an output voltage of a switching circuit and a nominal signal; a single control signal is generated, representative of an average error of the error signal; the single control signal is compared with a first periodic reference signal and a second periodic reference signal; a first pulse width modulated signal is generated by a Buck modulator; and a second pulse width modulated signal is generated by a Boost modulator. The maximum value of the first periodic reference signal and the minimum value of the second periodic reference signal are higher and lower, respectively, than the single control signal in a transient control mode between a Buck control mode and a Boost control mode.
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公开(公告)号:US11171478B2
公开(公告)日:2021-11-09
申请号:US16882618
申请日:2020-05-25
Applicant: STMicroelectronics S.r.l.
Inventor: Manuela La Rosa , Giovanni Sicurella
Abstract: A power stage in an electronic fuse circuit is driven by controller. The controller includes a first comparator set for output voltage control and a second comparator set for output current control. Each comparator set includes at least one comparator having a reference input, a feedback input, and one or more outputs. A driver circuit includes output terminals for driving the power stage. The driver circuit includes a switch that is selectively activated in response to outputs from the first and second comparator sets to clamp the voltage across the output terminals of the driver circuit. The clamp operation is made in response to feedback input to either of the first and second comparator sets having exceeded a certain reference.
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公开(公告)号:US10666039B2
公开(公告)日:2020-05-26
申请号:US15452944
申请日:2017-03-08
Applicant: STMicroelectronics S.r.l.
Inventor: Manuela La Rosa , Giovanni Sicurella
Abstract: A power stage in an electronic fuse circuit is driven by controller. The controller includes a first comparator set for output voltage control and a second comparator set for output current control. Each comparator set includes at least one comparator having a reference input, a feedback input, and one or more outputs. A driver circuit includes output terminals for driving the power stage. The driver circuit includes a switch that is selectively activated in response to outputs from the first and second comparator sets to clamp the voltage across the output terminals of the driver circuit. The clamp operation is made in response to feedback input to either of the first and second comparator sets having exceeded a certain reference.
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8.
公开(公告)号:US20190372579A1
公开(公告)日:2019-12-05
申请号:US16422416
申请日:2019-05-24
Applicant: STMicroelectronics S.r.l.
Inventor: Manuela La Rosa , Giovanni Sicurella
Abstract: A converter circuit is used to selectively convert an analog input voltage into a digital output signal or a digital input signal into an analog output voltage as a function of a mode signal. The converter circuit includes a control circuit configured to generate a start-of-conversion signal. A ramp generator is configured to, when the mode signal indicates an analog-to-digital conversion, generate a timer stop signal after a time interval that is determined as a function of the value of the analog input voltage, thereby implementing an analog-to-time conversion. When the mode signal indicates a digital-to-analog conversion, ramp generator is configured to vary the ramp signal until a ramp stop signal is set and, in response to the ramp stop signal, determine the analog output voltage as a function of the ramp signal, thereby implementing a time-to-analog conversion.
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公开(公告)号:US20180062376A1
公开(公告)日:2018-03-01
申请号:US15452944
申请日:2017-03-08
Applicant: STMicroelectronics S.r.l.
Inventor: Manuela La Rosa , Giovanni Sicurella
CPC classification number: H02H3/20 , H02H1/0007 , H02H3/021 , H02H3/38 , H02H9/001 , H02H9/02 , H02H9/041 , H02H9/043
Abstract: A power stage in an electronic fuse circuit is driven by controller. The controller includes a first comparator set for output voltage control and a second comparator set for output current control. Each comparator set includes at least one comparator having a reference input, a feedback input, and one or more outputs. A driver circuit includes output terminals for driving the power stage. The driver circuit includes a switch that is selectively activated in response to outputs from the first and second comparator sets to clamp the voltage across the output terminals of the driver circuit. The clamp operation is made in response to feedback input to either of the first and second comparator sets having exceeded a certain reference.
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公开(公告)号:US11955877B2
公开(公告)日:2024-04-09
申请号:US17387296
申请日:2021-07-28
Applicant: STMicroelectronics S.r.l.
Inventor: Alessandro Nicolosi , Giovanni Sicurella
CPC classification number: H02M1/0035 , H02M3/158
Abstract: A method to operate a DC-DC power converter in a low power burst mode, the method including sampling an output voltage of the DC-DC power converter with a sampling frequency to determine when to initiate a burst for the low power burst mode; and adapting the sampling frequency based on the output voltage.
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