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公开(公告)号：US12218594B2
公开(公告)日：2025-02-04
申请号：US16988379
申请日：2020-08-07
Applicant: STMicroelectronics S.r.l.
Inventor： Manuela La Rosa , Giovanni Sicurella
Abstract: A control circuit and method, wherein an error signal is generated representative of a difference between an output voltage of a switching circuit and a nominal signal; a single control signal is generated, representative of an average error of the error signal; the single control signal is compared with a first periodic reference signal and a second periodic reference signal; a first pulse width modulated signal is generated by a Buck modulator; and a second pulse width modulated signal is generated by a Boost modulator. The maximum value of the first periodic reference signal and the minimum value of the second periodic reference signal are higher and lower, respectively, than the single control signal in a transient control mode between a Buck control mode and a Boost control mode.
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公开(公告)号：US11171478B2
公开(公告)日：2021-11-09
申请号：US16882618
申请日：2020-05-25
Applicant: STMicroelectronics S.r.l.
Inventor： Manuela La Rosa , Giovanni Sicurella
Abstract: A power stage in an electronic fuse circuit is driven by controller. The controller includes a first comparator set for output voltage control and a second comparator set for output current control. Each comparator set includes at least one comparator having a reference input, a feedback input, and one or more outputs. A driver circuit includes output terminals for driving the power stage. The driver circuit includes a switch that is selectively activated in response to outputs from the first and second comparator sets to clamp the voltage across the output terminals of the driver circuit. The clamp operation is made in response to feedback input to either of the first and second comparator sets having exceeded a certain reference.
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公开(公告)号：US10666039B2
公开(公告)日：2020-05-26
申请号：US15452944
申请日：2017-03-08
Applicant: STMicroelectronics S.r.l.
Inventor： Manuela La Rosa , Giovanni Sicurella
Abstract: A power stage in an electronic fuse circuit is driven by controller. The controller includes a first comparator set for output voltage control and a second comparator set for output current control. Each comparator set includes at least one comparator having a reference input, a feedback input, and one or more outputs. A driver circuit includes output terminals for driving the power stage. The driver circuit includes a switch that is selectively activated in response to outputs from the first and second comparator sets to clamp the voltage across the output terminals of the driver circuit. The clamp operation is made in response to feedback input to either of the first and second comparator sets having exceeded a certain reference.
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4.发明申请公开(公告)号：US20190372579A1
公开(公告)日：2019-12-05
申请号：US16422416
申请日：2019-05-24
Applicant: STMicroelectronics S.r.l.
Inventor： Manuela La Rosa , Giovanni Sicurella
Abstract: A converter circuit is used to selectively convert an analog input voltage into a digital output signal or a digital input signal into an analog output voltage as a function of a mode signal. The converter circuit includes a control circuit configured to generate a start-of-conversion signal. A ramp generator is configured to, when the mode signal indicates an analog-to-digital conversion, generate a timer stop signal after a time interval that is determined as a function of the value of the analog input voltage, thereby implementing an analog-to-time conversion. When the mode signal indicates a digital-to-analog conversion, ramp generator is configured to vary the ramp signal until a ramp stop signal is set and, in response to the ramp stop signal, determine the analog output voltage as a function of the ramp signal, thereby implementing a time-to-analog conversion.
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公开(公告)号：US20180062376A1
公开(公告)日：2018-03-01
申请号：US15452944
申请日：2017-03-08
Applicant: STMicroelectronics S.r.l.
Inventor： Manuela La Rosa , Giovanni Sicurella
CPC classification number: H02H3/20 , H02H1/0007 , H02H3/021 , H02H3/38 , H02H9/001 , H02H9/02 , H02H9/041 , H02H9/043
Abstract: A power stage in an electronic fuse circuit is driven by controller. The controller includes a first comparator set for output voltage control and a second comparator set for output current control. Each comparator set includes at least one comparator having a reference input, a feedback input, and one or more outputs. A driver circuit includes output terminals for driving the power stage. The driver circuit includes a switch that is selectively activated in response to outputs from the first and second comparator sets to clamp the voltage across the output terminals of the driver circuit. The clamp operation is made in response to feedback input to either of the first and second comparator sets having exceeded a certain reference.
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Patent Agency Ranking
公开(公告)号：US11522363B2
公开(公告)日：2022-12-06
申请号：US16555220
申请日：2019-08-29
Applicant: STMicroelectronics S.r.l.
Inventor： Manuela La Rosa , Giovanni Sicurella , Giuseppe Meola
Abstract: An input node is configured to receive a supply signal which may be of a first polarity or a second polarity opposite the first polarity. A high input current circuit couples the input node to an output node through at least one power transistor having a control electrode. A low input current circuit couples a supply current from the input node to control circuit configured to control the power transistor. A circuit is provided to detect polarity reversal with respect to the supply signal. A protection circuit for the low input current circuit operates to decouple the control circuit from the input node if the supply signal has the second polarity. A protection circuit for the high input current circuit operates to short-circuit the control electrode of the power transistor to the current path provided by the power transistor between the input node and the output node.
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公开(公告)号：US11101813B2
公开(公告)日：2021-08-24
申请号：US16993608
申请日：2020-08-14
Applicant: STMicroelectronics S.r.l.
Inventor： Giovanni Sicurella , Manuela La Rosa
Abstract: A multiple-input analog-to-digital converter device includes analog-to-digital converter circuits arranged between input nodes and output nodes. The analog-to-digital converter circuits operate over respective conversion times to provide simultaneous conversion of the analog input signals into respective conversion time signals. A time-to-digital converter circuit includes timer circuitry common to the plurality of analog-to-digital converter circuits. The timer circuitry cooperates with the analog-to-digital converter circuits to convert the conversion time signals into digital output signals at the output nodes.
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公开(公告)号：US20210050787A1
公开(公告)日：2021-02-18
申请号：US16988379
申请日：2020-08-07
Applicant: STMicroelectronics S.r.l.
Inventor： Manuela La Rosa , Giovanni Sicurella
Abstract: A control circuit and method, wherein an error signal is generated representative of a difference between an output voltage of a switching circuit and a nominal signal; a single control signal is generated, representative of an average error of the error signal; the single control signal is compared with a first periodic reference signal and a second periodic reference signal; a first pulse width modulated signal is generated by a Buck modulator; and a second pulse width modulated signal is generated by a Boost modulator. The maximum value of the first periodic reference signal and the minimum value of the second periodic reference signal are higher and lower, respectively, than the single control signal in a transient control mode between a Buck control mode and a Boost control mode.
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公开(公告)号：US10713446B2
公开(公告)日：2020-07-14
申请号：US16274987
申请日：2019-02-13
Applicant: STMicroelectronics S.r.l.
Inventor： Giovanni Sicurella , Manuela La Rosa
IPC: G01R21/127 , G06G7/161
Abstract: A voltage-to-time converter circuit receives a first voltage signal and produces a PWM-modulated signal having a duty-cycle proportional to the first voltage signal. A current integrator circuit receives the PWM-modulated signal from the voltage-to-time converter circuit block and produces an output signal by integrating a current signal from a current source over integration time intervals having a duration which is a function of the duty-cycle of the PWM-modulated signal. The current signal is proportional to a second voltage signal. The output signal is accordingly proportional to a product of the first voltage signal and the current signal, which is furthermore proportional to a product of the first voltage signal and the second voltage signal.
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10.发明授权公开(公告)号：US10771075B2
公开(公告)日：2020-09-08
申请号：US16422416
申请日：2019-05-24
Applicant: STMicroelectronics S.r.l.
Inventor： Manuela La Rosa , Giovanni Sicurella
Abstract: A converter circuit is used to selectively convert an analog input voltage into a digital output signal or a digital input signal into an analog output voltage as a function of a mode signal. The converter circuit includes a control circuit configured to generate a start-of-conversion signal. A ramp generator is configured to, when the mode signal indicates an analog-to-digital conversion, generate a timer stop signal after a time interval that is determined as a function of the value of the analog input voltage, thereby implementing an analog-to-time conversion. When the mode signal indicates a digital-to-analog conversion, ramp generator is configured to vary the ramp signal until a ramp stop signal is set and, in response to the ramp stop signal, determine the analog output voltage as a function of the ramp signal, thereby implementing a time-to-analog conversion.
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