公开(公告)号：US20230223079A1

公开(公告)日：2023-07-13

申请号：US18148378

申请日：2022-12-29

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Alessandro TOMASONI ,  Fabio Enrico Carlo DISEGNI ,  Marcella CARISSIMI ,  Daniele LO IACONO

IPC: G11C11/56 ,  G11C13/00

CPC classification number: G11C11/5678 ,  G11C13/0004 ,  G11C13/0023 ,  G11C13/004 ,  G11C2013/0054

Abstract: The present disclosure is directed to a method for storing information in a coded manner in non-volatile memory cells. The method includes providing a group of non-volatile memory cells of non volatile memory. The memory cell is of the type in which a stored logic state, which can be logic high or logic low, can be changed through application of a current to the cell and the state in the memory cell is read by reading a current provided by the cell. The group of non-volatile memory cells include a determined number of non-volatile memory cells which is greater than two. The group of non-volatile memory cells store a codeword formed by the values of said stored states of the cells of the group taken according to a given order. Given a set of codewords obtainable by the stored values in the determined number of non-volatile memory cells in a group, the method includes storing the information in at least two subsets of said set of codewords comprising each at least a codeword. Each codeword in a same subset has a same Hamming weight. Each codeword belonging to one subset has a Hamming distance equal or greater than two with respect to each codeword belonging to another subset.

公开(公告)号：US20130272462A1

公开(公告)日：2013-10-17

申请号：US13873081

申请日：2013-04-29

Applicant: STMicroelectronics S.r.l.

Inventor： Massimiliano SITI ,  Alessandro TOMASONI ,  Marco FERRARI ,  Sandro BELLINI ,  Oscar VOLPATTI

IPC: H04L1/00

CPC classification number: H04L1/0055 ,  H04B7/0413 ,  H04L1/005 ,  H04L1/0064 ,  H04L1/0656 ,  H04L25/03171 ,  H04L25/03292 ,  H04L25/03331 ,  H04L25/03891 ,  H04L2025/03414 ,  H04L2025/03426

Abstract: An embodiment of an arrangement detects sequences of digitally modulated symbols from multiple sources. The arrangement identifies a suitable set of candidate values for at least one transmitted sequence of symbols and determines for each candidate value a set of sequences of transmitted symbols. The arrangement estimates at least one further set of sequences of transmitted symbols, calculates a metric for each sequence of transmitted symbols, and selects the sequence that maximizes the metric. At the end, a-posteriori bit soft output information for the selected sequence is calculated from the metrics for said sequences. Generally, these calculations are based on the information coming from a channel-state-information matrix and a-priori information on the modulated symbols from a second module, such as a forward error-correction-code (ECC) decoder.

Abstract translation: 布置的实施例检测来自多个源的数字调制符号的序列。 该装置为至少一个发送的符号序列识别适当的一组候选值，并且为每个候选值确定一组发送符号的序列。 该装置估计至少一组另外的发送符号序列集合，计算发送符号的每个序列的度量，并选择使度量最大化的序列。 最后，从所述序列的度量计算所选序列的后验位软输出信息。 通常，这些计算基于来自信道状态信息矩阵的信息和来自第二模块（诸如前向纠错码（ECC））解码器的调制符号的先验信息。

公开(公告)号：US20230245699A1

公开(公告)日：2023-08-03

申请号：US18148380

申请日：2022-12-29

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Fabio Enrico Carlo DISEGNI ,  Marcella CARISSIMI ,  Alessandro TOMASONI ,  Daniele LO IACONO

IPC: G11C13/00

CPC classification number: G11C13/004 ,  G11C13/0004 ,  G11C2013/0045 ,  G11C2013/0054

Abstract: The present disclosure is directed to a sense amplifier architecture for a memory device having a plurality of memory cells. Groups of non-volatile memory cells store respective codewords formed by stored logic states, logic high or logic low, of the memory cells of the group. The sense amplifier architecture has a plurality of sense amplifier reading branches, each sense amplifier reading branch coupled to a respective memory cell and configured to provide an output signal, which is indicative of a cell current flowing through the same memory cell; a comparison stage, to perform a comparison between the cell currents of memory cells of a group; and a logic stage, to determine, based on comparison results provided by the comparison stage, a read codeword corresponding to the group of memory cells. Information may be stored in different subsets of codewords, the sense amplifier architecture in this case having a subset definition circuit, to allow a preliminary determination of the subset to which a codeword to be read belongs to, based on reference signals.