公开(公告)号：US20230087112A1

公开(公告)日：2023-03-23

申请号：US17939842

申请日：2022-09-07

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Filippo GIANNAZZO ,  Giuseppe Greco ,  Fabrizio ROCCAFORTE ,  Simone RASCUNA'

IPC: H01L29/66 ,  H01L29/16 ,  H01L29/45 ,  H01L29/868 ,  H01L29/872 ,  H01L21/04

Abstract: Merged-PiN-Schottky, MPS, device comprising: a solid body having a first electrical conductivity; an implanted region extending into the solid body facing a front side of the solid body, having a second electrical conductivity opposite to the first electrical conductivity; and a semiconductor layer extending on the front side, of a material which is a transition metal dichalcogenide, TMD. A first region of the semiconductor layer has the second electrical conductivity and extends in electrical contact with the implanted region, and a second region of the semiconductor layer has the first electrical conductivity and extends adjacent to the first region and in electrical contact with a respective surface portion of the front side having the first electrical conductivity.

公开(公告)号：US20230246100A1

公开(公告)日：2023-08-03

申请号：US18158986

申请日：2023-01-24

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Ferdinando IUCOLANO ,  Filippo GIANNAZZO ,  Giuseppe Greco ,  Fabrizio ROCCAFORTE

IPC: H01L29/778 ,  H01L29/66 ,  H01L29/40 ,  H01L29/417 ,  H01L29/423 ,  H01L21/02 ,  H01L21/027 ,  H01L21/285 ,  H01L21/308 ,  H01L21/3065 ,  H01L21/3205

CPC classification number: H01L29/7786 ,  H01L29/66431 ,  H01L29/401 ,  H01L29/41775 ,  H01L29/42316 ,  H01L21/02565 ,  H01L21/0262 ,  H01L21/0272 ,  H01L21/28506 ,  H01L21/3086 ,  H01L21/3081 ,  H01L21/3065 ,  H01L21/32051

Abstract: An enhancement mode high electron-mobility transistor (HEMT) device includes a semiconductor body having a top surface and including a heterostructure configured to generate a two-dimensional electron gas, 2DEG. The HEMT device includes a gate structure which extends on the top surface of the semiconductor body, is biasable to electrically control the 2DEG and includes a functional layer and a gate contact in direct physical and electrical contact with each other. The gate contact is of conductive material and the functional layer is of two-dimensional semiconductor material and includes a first doped portion with P-type electrical conductivity, which extends on the top surface of the semiconductor body and is interposed between the semiconductor body and the gate contact along a first axis.