公开(公告)号：US20210111214A1

公开(公告)日：2021-04-15

申请号：US17128604

申请日：2020-12-21

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Francois ROY ,  Sonarith CHHUN

IPC: H01L27/146

Abstract: An electronic device includes a substrate semiconductor wafer with semiconductor portions separated from one another by through-passages. Electronic circuits and a dielectric layer with a network of electrical connections are formed at a front face of the substrate semiconductor wafer. Electrically conductive fillings are contained within the through-passages and are connected to the network of electrical connections. Interior dielectric layers for anti-diffusion protection are provided in the through-passages between the electrically conductive fillings and the semiconductor portions. Back side dielectric layers are joined to the interior dielectric layers.

公开(公告)号：US20240128289A1

公开(公告)日：2024-04-18

申请号：US18391222

申请日：2023-12-20

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Francois ROY ,  Andrej SULER

IPC: H01L27/146

CPC classification number: H01L27/14614 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/1464 ,  H01L27/14645 ,  H01L27/14689

Abstract: The present disclosure concerns an image sensor including a plurality of pixels, each including: a doped photosensitive region of a first conductivity type extending vertically in a semiconductor substrate; a charge collection region more heavily doped with the first conductivity type than the photosensitive region, extending vertically in the substrate from an upper surface of the substrate and being arranged above the photosensitive region; and a vertical stack including a vertical transfer gate and a vertical electric insulation wall, the stack crossing the substrate and being in contact with the charge collection region, the gate being arranged on the upper surface side of the substrate and penetrating into the substrate deeper than the charge collection region.

公开(公告)号：US20220406837A1

公开(公告)日：2022-12-22

申请号：US17840027

申请日：2022-06-14

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Francois ROY

IPC: H01L27/146

Abstract: A photosensitive sensor includes a pixel formed by a photosensitive region in a first semiconductor material, a read region in a second semiconductor material, and a transfer gate facing the parts of the first semiconductor material and the second semiconductor material located between the photosensitive region and the read region. The first semiconductor material and the second semiconductor material have different band gaps and are in contact with one another to form a heterojunction facing the transfer gate.

公开(公告)号：US20210193708A1

公开(公告)日：2021-06-24

申请号：US17122394

申请日：2020-12-15

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Francois ROY

IPC: H01L27/146

Abstract: A back side illuminated image sensor includes a pixel formed by three doped photosensitive regions that are superposed vertically in a semiconductor substrate. Each photosensitive region is laterally framed by a respective vertical annular gate. The vertical annular gates are biased by a control circuit during an integration phase so as to generate an electrostatic potential comprising potential wells in the central portion of the volume of each doped photosensitive region and a potential barrier at each interface between two neighboring doped photosensitive regions.

公开(公告)号：US20190027523A1

公开(公告)日：2019-01-24

申请号：US16035193

申请日：2018-07-13

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Francois ROY

IPC: H01L27/146

Abstract: An electronic image capture device includes a first portion and a second portion. The first portion is formed by a substrate wafer provided on one side with electronic circuits and a dielectric layer with a network of electrical connections and external electrical contacts on an outer surface. The second portion includes a pixel wafer capable of generating electrical signals under the effect of light, a substrate wafer mounted to the pixel wafer and provided with electronic circuits and a dielectric layer with a network of electrical connections and external electrical contacts on an outer surface. The outer surfaces and external electrical contacts are bonded to each other so as to mount the first portion to the second portion. A connection pad extends through a hole in the pixel wafer to make electrical connection to the network of electrical connections of the second portion.

公开(公告)号：US20240332324A1

公开(公告)日：2024-10-03

申请号：US18739927

申请日：2024-06-11

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Francois ROY

IPC: H01L27/146 ,  H04N25/53 ,  H04N25/621 ,  H04N25/705 ,  H04N25/75 ,  H04N25/77

CPC classification number: H01L27/14603 ,  H01L27/1463 ,  H04N25/53 ,  H04N25/621 ,  H04N25/705 ,  H04N25/75 ,  H04N25/77

Abstract: A sensor includes pixels supported by a substrate doped with a first conductivity type. Each pixel includes a portion of the substrate delimited by a vertical insulation structure with an image sensing assembly and a depth sensing assembly. The image sensing assembly includes a first region of the substrate more heavily doped with the first conductivity type and a first vertical transfer gate completely laterally surrounding the first region. Each of the depth sensing assemblies includes a second region of the substrate more heavily doped with the first conductivity type a second vertical transfer gate opposite a corresponding portion of the first vertical transfer gate. The second region is arranged between the second vertical transfer gate and the corresponding portion of the first vertical transfer gate.

公开(公告)号：US20230290801A1

公开(公告)日：2023-09-14

申请号：US18198384

申请日：2023-05-17

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Francois ROY

IPC: H01L27/146

CPC classification number: H01L27/1464 ,  H01L27/14603 ,  H01L27/14616

Abstract: A back side illuminated image sensor includes a pixel formed by three doped photosensitive regions that are superposed vertically in a semiconductor substrate. Each photosensitive region is laterally framed by a respective vertical annular gate. The vertical annular gates are biased by a control circuit during an integration phase so as to generate an electrostatic potential comprising potential wells in the central portion of the volume of each doped photosensitive region and a potential barrier at each interface between two neighboring doped photosensitive regions.

公开(公告)号：US20210305311A1

公开(公告)日：2021-09-30

申请号：US17199779

申请日：2021-03-12

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Francois ROY

IPC: H01L27/148 ,  H04N5/372

Abstract: A charge-coupled device includes an array of insulated electrodes vertically penetrating into a semiconductor substrate. The array includes rows of alternated longitudinal and transverse electrodes. Each end of a longitudinal electrode of a row is opposite and separated from a portion of an adjacent transverse electrode of that row. Electric insulation walls extend parallel to one another and to the longitudinal electrodes. The insulation walls penetrate vertically into the substrate deeper than the longitudinal electrodes. At least two adjacent rows of electrodes are arranged between each two successive insulation walls.

公开(公告)号：US20200313023A1

公开(公告)日：2020-10-01

申请号：US16825298

申请日：2020-03-20

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Arnaud TOURNIER ,  Boris RODRIGUES GONCALVES ,  Francois ROY

IPC: H01L31/107 ,  H01L27/146

Abstract: An electronic device is provided that includes a photodiode. The photodiode includes a semiconductor region coupled to a node of application of a first voltage, and at least one semiconductor wall. The at least one semiconductor wall extends along at least a height of the photodiode and partially surrounds the semiconductor region.

公开(公告)号：US20190312170A1

公开(公告)日：2019-10-10

申请号：US16222542

申请日：2018-12-17

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Francois ROY

IPC: H01L31/113 ,  H01L27/146 ,  H01L31/0224

Abstract: A semiconductor substrate doped with a first doping type is positioned adjacent an insulated gate electrode that is biased by a gate voltage. A first region within the semiconductor substrate is doped with the first doping type and biased with a bias voltage. A second region within the semiconductor substrate is doped with a second doping type that is opposite the first doping type. Voltage application produces an electrostatic field within the semiconductor substrate causing the formation of a fully depleted region within the semiconductor substrate. The fully depleted region responds to absorption of a photon with an avalanche multiplication that produces charges that are collected at the first and second regions.