公开(公告)号：US20210057358A1

公开(公告)日：2021-02-25

申请号：US17091466

申请日：2020-11-06

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Alexandre SARAFIANOS ,  Abderrezak MARZAKI

IPC: H01L23/00 ,  G06F21/87 ,  H04L9/00 ,  H01L29/06 ,  G06F21/78 ,  G06F21/55

Abstract: An integrated circuit includes a semiconductor substrate having a rear face. A first semiconductor well within the substrate includes circuit components. A second semiconductor well within the substrate is insulated from the first semiconductor well and the rest of the substrate. The second semiconductor well provides a detection device that is configurable and designed to detect a DFA attack by fault injection into the integrated circuit.

公开(公告)号：US20190244915A1

公开(公告)日：2019-08-08

申请号：US16267573

申请日：2019-02-05

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Alexandre SARAFIANOS ,  Bruno NICOLAS ,  Daniele FRONTE

IPC: H01L23/00 ,  G06F21/75 ,  G06F21/77

CPC classification number: H01L23/57 ,  G06F21/75 ,  G06F21/77 ,  G06K19/07372 ,  H01L23/576

Abstract: A semiconductor substrate of an integrated circuit is protected by a coating. The semiconductor includes a front face and a rear face. To detect a breach of the integrity of a semiconductor substrate of an integrated circuit from the rear face, an opening of the coating facing the rear face of the substrate is detected. In response thereto, an alarm is generated. The detection is performed by making resistance measurements with respect to the semiconductor substrate and comparing the measured resistance to a nominal resistive value of the semiconductor substrate.

公开(公告)号：US20180261560A1

公开(公告)日：2018-09-13

申请号：US15916183

申请日：2018-03-08

Applicant: STMICROELECTRONICS (ROUSSET) SAS

Inventor： Alexandre SARAFIANOS ,  Jimmy FORT ,  Thierry SOUDE

IPC: H01L23/00 ,  H01L21/66 ,  H01L29/36 ,  H01L21/74 ,  G01R31/26

Abstract: An electronic chip including a plurality of buried doped bars and a circuit for detecting an anomaly of an electric characteristic of the bars.

公开(公告)号：US20150194393A1

公开(公告)日：2015-07-09

申请号：US14667232

申请日：2015-03-24

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Mathieu LISART ,  Sylvie WUIDART ,  Alexandre SARAFIANOS

IPC: H01L23/00 ,  H01L21/66

CPC classification number: H01L23/576 ,  G06F21/75 ,  H01L22/14 ,  H01L22/30 ,  H01L22/34 ,  H01L2924/0002 ,  Y10T307/76 ,  H01L2924/00

Abstract: An integrated circuit, including: a semiconductor substrate of a first conductivity type; a plurality of regions of the first conductivity type vertically extending from the surface of the substrate, each of the regions being laterally delimited all along its periphery by a region of the second conductivity type; and a device for detecting a variation of the substrate resistance between each region of the first conductivity type and an area for biasing the substrate to a reference voltage.

Abstract translation: 一种集成电路，包括：第一导电类型的半导体衬底; 所述第一导电类型的多个区域从所述基板的表面垂直延伸，每个所述区域沿着其外围沿着所述第二导电类型的区域横向界定; 以及用于检测第一导电类型的每个区域和用于将衬底偏压的区域之间的衬底电阻变化为参考电压的装置。

公开(公告)号：US20230119204A1

公开(公告)日：2023-04-20

申请号：US18082155

申请日：2022-12-15

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Alexandre SARAFIANOS ,  Abderrezak MARZAKI

IPC: H01L21/66 ,  H01L23/00 ,  H03K19/00 ,  H01L29/00

Abstract: A semiconductor substrate includes a buried semiconductor layer and semiconductor wells. A device for detecting a possible thinning of the semiconductor substrate via the rear face thereof is formed on and in the semiconductor wells. The device is a non-inverting buffer including an input terminal and an output terminal, the device being powered between a supply terminal and a reference terminal where the buried semiconductor layer provides the supply terminal. A control circuit delivers an input signal in a first state to the input terminal and outputs a control signal indicating a detection of a thinning of the substrate if a signal generated at the output terminal in response to the input signal is in a second state different from the first state.

公开(公告)号：US20190355673A1

公开(公告)日：2019-11-21

申请号：US16409704

申请日：2019-05-10

Applicant: STMICROELECTRONICS (ROUSSET) SAS

Inventor： Alexandre SARAFIANOS ,  Bruno NICOLAS ,  Daniele FRONTE

IPC: H01L23/00 ,  H01L23/522 ,  H01L23/528 ,  G01N27/04

Abstract: The disclosure concerns an electronic chip including a resistive region and a first switch of selection of a first area in contact with the resistive region.

公开(公告)号：US20190354728A1

公开(公告)日：2019-11-21

申请号：US16411819

申请日：2019-05-14

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Alexandre SARAFIANOS ,  Thomas ORDAS ,  Yanis LINGE ,  Jimmy FORT

IPC: G06F21/75 ,  G06F17/50 ,  H04L9/00

Abstract: The supply voltage for a module of an integrated circuit managed to support protection against side channel attacks. Upon startup of the integrated circuit, one action from the following actions is selected in response to a command: supplying the module with the supply voltage having a fixed value that is selected from a plurality of predetermined values, or varying the value of the supply voltage in time with a pulsed signal.

公开(公告)号：US20190172759A1

公开(公告)日：2019-06-06

申请号：US16209044

申请日：2018-12-04

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Alexandre SARAFIANOS ,  Abderrezak MARZAKI

IPC: H01L21/66

Abstract: A semiconductor substrate includes a buried semiconductor layer and semiconductor wells. A device for detecting a possible thinning of the semiconductor substrate via the rear face thereof is formed on and in the semiconductor wells. The device is a non-inverting buffer including an input terminal and an output terminal, the device being powered between a supply terminal and a reference terminal where the buried semiconductor layer provides the supply terminal. A control circuit delivers an input signal in a first state to the input terminal and outputs a control signal indicating a detection of a thinning of the substrate if a signal generated at the output terminal in response to the input signal is in a second state different from the first state.

公开(公告)号：US20190109100A1

公开(公告)日：2019-04-11

申请号：US16154456

申请日：2018-10-08

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Alexandre SARAFIANOS ,  Abderrezak MARZAKI

IPC: H01L23/00 ,  G06F21/87 ,  H04L9/00 ,  G06F21/78 ,  H01L29/06

Abstract: An integrated circuit includes a semiconductor substrate having a rear face. A first semiconductor well within the substrate includes circuit components. A second semiconductor well within the substrate is insulated from the first semiconductor well and the rest of the substrate. The second semiconductor well provides a detection device that is configurable and designed, in a first configuration, to detect a thinning of the substrate via its rear face, and in a second configuration, to detect a DFA attack by fault injection into the integrated circuit.

公开(公告)号：US20190081011A1

公开(公告)日：2019-03-14

申请号：US16129163

申请日：2018-09-12

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Alexandre SARAFIANOS ,  Abderrezak MARZAKI

IPC: H01L23/00

CPC classification number: H01L23/576 ,  H01L22/14 ,  H01L22/34 ,  H01L29/0649 ,  H01L29/8613

Abstract: An electronic integrated circuit includes a semiconductor substrate having a rear face. A device for detecting a thinning of the semiconductor substrate via its rear face is formed by a p-n junction that is biased into conduction. Thinning of the substrate is detected by monitoring a current flowing through the p-n junction, and comparing that current to a threshold. In the event the compared current indicates no thinning of the semiconductor substrate, the circuitry for biasing and comparing is deactivated.