公开(公告)号：US20240363584A1

公开(公告)日：2024-10-31

申请号：US18637865

申请日：2024-04-17

Applicant: STMicroelectronics International N.V.

Inventor： Antonio BELLIZZI ,  Nicoletta MODARELLI

IPC: H01L23/00 ,  H01L21/56

CPC classification number: H01L24/97 ,  H01L21/561 ,  H01L24/48 ,  H01L2224/48175 ,  H01L2224/97

Abstract: Semiconductor dice are arranged onto a first surface of a common electrically conductive substrate. The common electrically conductive substrate has a second surface opposite the first surface and includes substrate portions and elongated sacrificial connecting bars extending between adjacent substrate portions. Insulating material is coated on the second surface of the elongate sacrificial connecting bars. Solder material is grown on the second surface of the common electrically conductive substrate. The insulating material counters growth of the solder material on the second surface of the elongate sacrificial connecting bars. Singulated individual semiconductor devices are provided by cutting the common electrically conductive substrate along the length of the elongate sacrificial connecting bars having the insulating material coated on its second surface.

公开(公告)号：US20240332250A1

公开(公告)日：2024-10-03

申请号：US18615039

申请日：2024-03-25

Applicant: STMicroelectronics International N.V.

Inventor： Antonio BELLIZZI ,  Guendalina CATALANO

IPC: H01L23/00 ,  H01L23/495

CPC classification number: H01L24/97 ,  H01L23/49548 ,  H01L24/27 ,  H01L24/29 ,  H01L24/98 ,  H01L2224/2746 ,  H01L2224/29111 ,  H01L2224/97 ,  H01L2224/98 ,  H01L2924/301

Abstract: Semiconductor chips are arranged on a first surface of a common electrically conductive substrate having an opposite second surface. The substrate includes adjacent substrate portions having mutually facing sides with sacrificial connecting bars extending between adjacent mutually facing sides. A solderable metallic layer is present on the second surface extending over the sacrificial connecting bars. The solderable metallic layer is selectively removed (by laser ablation or etching, for example) from at least part of the length the sacrificial connecting bars. The common electrically conductive substrate is then cut along the length of the elongate sacrificial connecting bars to provide singulated individual semiconductor devices. Undesired formation of electrically conductive filaments or flakes bridging parts of the substrate intended to be mutually isolated is countered.

公开(公告)号：US20250118703A1

公开(公告)日：2025-04-10

申请号：US18904478

申请日：2024-10-02

Applicant: STMicroelectronics International N.V.

Inventor： Claudio ZAFFERONI ,  Antonio BELLIZZI ,  Alessandro MELLINA GOTTARDO

IPC: H01L23/00

Abstract: A semiconductor chip is covered by a non-LDS encapsulation material (i.e., encapsulation material not including LDS-activatable additives). One or more first pathways are opened towards the semiconductor chip through the non-LDS encapsulation material. LDS encapsulation material (i.e., encapsulation material including LDS-activatable additives) is molded over the non-LDS encapsulation material to fill the first pathways. One or more second pathways, aligned with the first pathways, are opened towards the semiconductor chip through the LDS encapsulation material. The second pathways have an inner lining of LDS encapsulation material. Electrical coupling formations for the semiconductor chip are provided via laser direct structuring processing of the LDS encapsulation material including the inner lining in the second pathways.

公开(公告)号：US20240332238A1

公开(公告)日：2024-10-03

申请号：US18615286

申请日：2024-03-25

Applicant: STMicroelectronics International N.V.

Inventor： Guendalina CATALANO ,  Antonio BELLIZZI ,  Claudio ZAFFERONI

IPC: H01L23/00

CPC classification number: H01L24/19 ,  H01L24/24 ,  H01L2224/19 ,  H01L2224/24245 ,  H01L2924/18162

Abstract: Laser direct structure (LDS) material is molded onto a semiconductor chip arranged on a substrate. The LDS material has a first thickness between a front surface of the LDS material and the substrate. A portion of the LDS material is removed (with a blade, for instance) to form a cavity having an end wall between the front surface of the LDS material and an electrically conductive formation on the substrate. At the cavity, the LDS material has a second thick ness smaller than the first thickness. Laser beam energy is applied to the LDS material at the end wall of the cavity to structure therein one or more vias that extend between the end wall of the cavity and the electrically conductive formation. The semiconductor chip and the electrically conductive formation are electrically coupled with electrically conductive material grown in the one or more vias laser structured in the LDS material.